Lines Matching +full:ultra +full:- +full:low +full:- +full:power
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
52 /* Status/control registers (from the IA-32 System Programming Guide). */
65 int power; member
86 (((MHz / bus_clk) << 8) | ((mV ? mV - 700 : 0) >> 4))
102 static int strict = -1;
125 * Order Number 252612-003, Table 5.
171 /* 130nm 1.30GHz Low Voltage Pentium M */
181 /* 130 nm 1.20GHz Low Voltage Pentium M */
190 /* 130 nm 1.10GHz Low Voltage Pentium M */
198 /* 130 nm 1.10GHz Ultra Low Voltage Pentium M */
206 /* 130 nm 1.00GHz Ultra Low Voltage Pentium M */
215 * 2-MB L2 Cache Datasheet", Order Number 302189-008, Table 5.
450 /* 90 nm 1.60GHz Low Voltage Pentium M */
463 /* 90 nm 1.50GHz Low Voltage Pentium M */
475 /* 90 nm 1.40GHz Low Voltage Pentium M */
486 /* 90 nm 1.30GHz Ultra Low Voltage Pentium M, VID #G */
496 /* 90 nm 1.30GHz Ultra Low Voltage Pentium M, VID #H */
506 /* 90 nm 1.30GHz Ultra Low Voltage Pentium M, VID #I */
516 /* 90 nm 1.30GHz Ultra Low Voltage Pentium M, VID #J */
526 /* 90 nm 1.30GHz Ultra Low Voltage Pentium M, VID #K */
536 /* 90 nm 1.30GHz Ultra Low Voltage Pentium M, VID #L */
546 /* 90 nm 1.20GHz Ultra Low Voltage Pentium M, VID #G */
555 /* 90 nm 1.20GHz Ultra Low Voltage Pentium M, VID #H */
564 /* 90 nm 1.20GHz Ultra Low Voltage Pentium M, VID #I */
573 /* 90 nm 1.20GHz Ultra Low Voltage Pentium M, VID #J */
582 /* 90 nm 1.20GHz Ultra Low Voltage Pentium M, VID #K */
591 /* 90 nm 1.20GHz Ultra Low Voltage Pentium M, VID #L */
601 /* 90 nm 1.10GHz Ultra Low Voltage Pentium M, VID #G */
609 /* 90 nm 1.10GHz Ultra Low Voltage Pentium M, VID #H */
617 /* 90 nm 1.10GHz Ultra Low Voltage Pentium M, VID #I */
625 /* 90 nm 1.10GHz Ultra Low Voltage Pentium M, VID #J */
633 /* 90 nm 1.10GHz Ultra Low Voltage Pentium M, VID #K */
641 /* 90 nm 1.10GHz Ultra Low Voltage Pentium M, VID #L */
649 /* 90 nm 1.10GHz Ultra Low Voltage Pentium M */
657 /* 90 nm 1.00GHz Ultra Low Voltage Pentium M */
665 * VIA C7-M 500 MHz FSB, 400 MHz FSB, and ULV variants.
666 * Data from the "VIA C7-M Processor BIOS Writer's Guide (v2.17)" datasheet.
669 /* 2.00GHz Centaur C7-M 533 Mhz FSB */
680 /* 1.80GHz Centaur C7-M 533 Mhz FSB */
690 /* 1.60GHz Centaur C7-M 533 Mhz FSB */
700 /* 2.00GHz Centaur C7-M 400 Mhz FSB */
711 /* 1.80GHz Centaur C7-M 400 Mhz FSB */
721 /* 1.60GHz Centaur C7-M 400 Mhz FSB */
730 /* 1.50GHz Centaur C7-M 400 Mhz FSB */
739 /* 1.20GHz Centaur C7-M 400 Mhz FSB */
748 /* 1.50GHz Centaur C7-M ULV */
757 /* 1.20GHz Centaur C7-M ULV */
765 /* 1.00GHz Centaur C7-M ULV */
772 /* 1.00GHz Centaur C7-M ULV */
997 sc->dev = dev; in est_attach()
1000 if (strict == -1 && mp_ncpus > 1) in est_attach()
1021 if (sc->acpi_settings || sc->msr_settings) in est_detach()
1022 free(sc->freq_list, M_DEVBUF); in est_detach()
1030 * series) export both legacy SMM IO-based access and direct MSR access
1042 error = est_table_info(dev, msr, &sc->freq_list, &sc->flist_len); in est_get_info()
1044 error = est_acpi_info(dev, &sc->freq_list, &sc->flist_len); in est_get_info()
1046 error = est_msr_info(dev, msr, &sc->freq_list, &sc->flist_len); in est_get_info()
1106 table[j].power = sets[i].power; in est_acpi_info()
1113 sc->acpi_settings = TRUE; in est_acpi_info()
1134 for (p = ESTprocs; p->id32 != 0; p++) { in est_table_info()
1135 if (p->vendor_id == cpu_vendor_id && p->id32 == id) in est_table_info()
1138 if (p->id32 == 0) in est_table_info()
1142 if (est_get_current(p->freqtab, p->tablen) == NULL) { in est_table_info()
1147 *freqs = p->freqtab; in est_table_info()
1148 *freqslen = p->tablen; in est_table_info()
1167 * Flesh out a simple rate table containing the high and low frequencies
1187 /* We may be running on the low frequency. */ in est_msr_info()
1190 device_printf(dev, "Guessed bus clock (low) of %d MHz\n", bus); in est_msr_info()
1199 /* Fill out a new freq table containing just the high and low freqs. */ in est_msr_info()
1212 fp[0].power = CPUFREQ_VAL_UNKNOWN; in est_msr_info()
1216 /* Second, the low frequency. */ in est_msr_info()
1227 fp[1].power = CPUFREQ_VAL_UNKNOWN; in est_msr_info()
1228 device_printf(dev, "Guessed low setting of %d MHz @ %d Mv\n", freq, in est_msr_info()
1232 sc->msr_settings = TRUE; in est_msr_info()
1285 if (f->id16 == id16) in est_get_current()
1305 for (f = sc->freq_list; f < sc->freq_list + sc->flist_len; f++, i++) { in est_settings()
1306 sets[i].freq = f->freq; in est_settings()
1307 sets[i].volts = f->volts; in est_settings()
1308 sets[i].power = f->power; in est_settings()
1325 for (f = sc->freq_list; f < sc->freq_list + sc->flist_len; f++) { in est_set()
1326 if (f->freq == set->freq) in est_set()
1329 if (f->freq == 0) in est_set()
1333 est_set_id16(dev, f->id16, 0); in est_set()
1345 f = est_get_current(sc->freq_list, sc->flist_len); in est_get()
1349 set->freq = f->freq; in est_get()
1350 set->volts = f->volts; in est_get()
1351 set->power = f->power; in est_get()
1352 set->lat = EST_TRANS_LAT; in est_get()
1353 set->dev = dev; in est_get()