Lines Matching +full:1300 +full:mv

84 /* Convert MHz and mV into IDs for passing to the MSR. */
85 #define ID16(MHz, mV, bus_clk)				\  argument
86 	(((MHz / bus_clk) << 8) | ((mV ? mV - 700 : 0) >> 4))
91 #define FREQ_INFO_PWR(MHz, mV, bus_clk, mW)		\  argument
92 	{ MHz, mV, ID16(MHz, mV, bus_clk), mW }
93 #define FREQ_INFO(MHz, mV, bus_clk)			\  argument
94 	FREQ_INFO_PWR(MHz, mV, bus_clk, CPUFREQ_VAL_UNKNOWN)
116  * Frequency (MHz) and voltage (mV) settings.
164 	FREQ_INFO(1300, 1388, INTEL_BUS_CLK),
172 	FREQ_INFO(1300, 1180, INTEL_BUS_CLK),
454 	FREQ_INFO(1300, 1084, INTEL_BUS_CLK),
466 	FREQ_INFO(1300, 1100, INTEL_BUS_CLK),
477 	FREQ_INFO(1300, 1116, INTEL_BUS_CLK),
487 	FREQ_INFO(1300,  956, INTEL_BUS_CLK),
497 	FREQ_INFO(1300,  940, INTEL_BUS_CLK),
507 	FREQ_INFO(1300,  924, INTEL_BUS_CLK),
517 	FREQ_INFO(1300,  908, INTEL_BUS_CLK),
527 	FREQ_INFO(1300,  892, INTEL_BUS_CLK),
537 	FREQ_INFO(1300,  876, INTEL_BUS_CLK),
784 	INTEL(PM13_130,		1300, 1388, 600, 956, INTEL_BUS_CLK),
785 	INTEL(PM13_LV_130,	1300, 1180, 600, 956, INTEL_BUS_CLK),
817 	INTEL(PM_773G_90,	1300,  956, 600, 812, INTEL_BUS_CLK),
818 	INTEL(PM_773H_90,	1300,  940, 600, 812, INTEL_BUS_CLK),
819 	INTEL(PM_773I_90,	1300,  924, 600, 812, INTEL_BUS_CLK),
820 	INTEL(PM_773J_90,	1300,  908, 600, 812, INTEL_BUS_CLK),
821 	INTEL(PM_773K_90,	1300,  892, 600, 812, INTEL_BUS_CLK),
822 	INTEL(PM_773L_90,	1300,  876, 600, 812, INTEL_BUS_CLK),
1213 	device_printf(dev, "Guessed high setting of %d MHz @ %d Mv\n", freq,  in est_msr_info()
1228 	device_printf(dev, "Guessed low setting of %d MHz @ %d Mv\n", freq,  in est_msr_info()