84 /* Convert MHz and mV into IDs for passing to the MSR. */
85 #define ID16(MHz, mV, bus_clk)				\  argument
86 	(((MHz / bus_clk) << 8) | ((mV ? mV - 700 : 0) >> 4))
91 #define FREQ_INFO_PWR(MHz, mV, bus_clk, mW)		\  argument
92 	{ MHz, mV, ID16(MHz, mV, bus_clk), mW }
93 #define FREQ_INFO(MHz, mV, bus_clk)			\  argument
94 	FREQ_INFO_PWR(MHz, mV, bus_clk, CPUFREQ_VAL_UNKNOWN)
106 #define INTEL_BUS_CLK		100
116  * Frequency (MHz) and voltage (mV) settings.
665  * VIA C7-M 500 MHz FSB, 400 MHz FSB, and ULV variants.
669 	/* 2.00GHz Centaur C7-M 533 Mhz FSB */
680 	/* 1.80GHz Centaur C7-M 533 Mhz FSB */
690 	/* 1.60GHz Centaur C7-M 533 Mhz FSB */
700 	/* 2.00GHz Centaur C7-M 400 Mhz FSB */
701 	FREQ_INFO_PWR(2000, 1148, 100, 20000),
702 	FREQ_INFO_PWR(1800, 1132, 100, 18000),
703 	FREQ_INFO_PWR(1600, 1100, 100, 15000),
704 	FREQ_INFO_PWR(1400, 1052, 100, 13000),
705 	FREQ_INFO_PWR(1000, 1004, 100, 10000),
706 	FREQ_INFO_PWR( 800,  844, 100,  7000),
707 	FREQ_INFO_PWR( 600,  844, 100,  6000),
708 	FREQ_INFO_PWR( 400,  844, 100,  5000),
711 	/* 1.80GHz Centaur C7-M 400 Mhz FSB */
712 	FREQ_INFO_PWR(1800, 1148, 100, 18000),
713 	FREQ_INFO_PWR(1600, 1100, 100, 15000),
714 	FREQ_INFO_PWR(1400, 1052, 100, 13000),
715 	FREQ_INFO_PWR(1000, 1004, 100, 10000),
716 	FREQ_INFO_PWR( 800,  844, 100,  7000),
717 	FREQ_INFO_PWR( 600,  844, 100,  6000),
718 	FREQ_INFO_PWR( 400,  844, 100,  5000),
721 	/* 1.60GHz Centaur C7-M 400 Mhz FSB */
722 	FREQ_INFO_PWR(1600, 1084, 100, 15000),
723 	FREQ_INFO_PWR(1400, 1052, 100, 13000),
724 	FREQ_INFO_PWR(1000, 1004, 100, 10000),
725 	FREQ_INFO_PWR( 800,  844, 100,  7000),
726 	FREQ_INFO_PWR( 600,  844, 100,  6000),
727 	FREQ_INFO_PWR( 400,  844, 100,  5000),
730 	/* 1.50GHz Centaur C7-M 400 Mhz FSB */
731 	FREQ_INFO_PWR(1500, 1004, 100, 12000),
732 	FREQ_INFO_PWR(1400,  988, 100, 11000),
733 	FREQ_INFO_PWR(1000,  940, 100,  9000),
734 	FREQ_INFO_PWR( 800,  844, 100,  7000),
735 	FREQ_INFO_PWR( 600,  844, 100,  6000),
736 	FREQ_INFO_PWR( 400,  844, 100,  5000),
739 	/* 1.20GHz Centaur C7-M 400 Mhz FSB */
740 	FREQ_INFO_PWR(1200,  860, 100,  7000),
741 	FREQ_INFO_PWR(1000,  860, 100,  6000),
742 	FREQ_INFO_PWR( 800,  844, 100,  5500),
743 	FREQ_INFO_PWR( 600,  844, 100,  5000),
744 	FREQ_INFO_PWR( 400,  844, 100,  4000),
749 	FREQ_INFO_PWR(1500,  956, 100,  7500),
750 	FREQ_INFO_PWR(1400,  940, 100,  6000),
751 	FREQ_INFO_PWR(1000,  860, 100,  5000),
752 	FREQ_INFO_PWR( 800,  828, 100,  2800),
753 	FREQ_INFO_PWR( 600,  796, 100,  2500),
754 	FREQ_INFO_PWR( 400,  796, 100,  2000),
758 	FREQ_INFO_PWR(1200,  844, 100,  5000),
759 	FREQ_INFO_PWR(1000,  844, 100,  4000),
760 	FREQ_INFO_PWR( 800,  828, 100,  2800),
761 	FREQ_INFO_PWR( 600,  796, 100,  2500),
762 	FREQ_INFO_PWR( 400,  796, 100,  2000),
766 	FREQ_INFO_PWR(1000,  796, 100,  3500),
767 	FREQ_INFO_PWR( 800,  796, 100,  2800),
768 	FREQ_INFO_PWR( 600,  796, 100,  2500),
769 	FREQ_INFO_PWR( 400,  796, 100,  2000),
773 	FREQ_INFO_PWR(1000,  844, 100,  5000),
774 	FREQ_INFO_PWR( 800,  796, 100,  2800),
775 	FREQ_INFO_PWR( 600,  796, 100,  2500),
776 	FREQ_INFO_PWR( 400,  796, 100,  2000),
839 	CENTAUR(C7M_794,	2000, 1148, 400, 844, 100),
841 	CENTAUR(C7M_784,	1800, 1148, 400, 844, 100),
843 	CENTAUR(C7M_764,	1600, 1084, 400, 844, 100),
844 	CENTAUR(C7M_754,	1500, 1004, 400, 844, 100),
845 	CENTAUR(C7M_775_ULV,	1500,  956, 400, 796, 100),
846 	CENTAUR(C7M_771,	1200,  860, 400, 844, 100),
847 	CENTAUR(C7M_772_ULV,	1200,  844, 400, 796, 100),
848 	CENTAUR(C7M_779_ULV,	1000,  796, 400, 796, 100),
849 	CENTAUR(C7M_770_ULV,	1000,  844, 400, 796, 100),
1155 	case 100:  in bus_speed_ok()
1183 	device_printf(dev, "Guessed bus clock (high) of %d MHz\n", bus);  in est_msr_info()
1188 		device_printf(dev, "Guessed bus clock (low) of %d MHz\n", bus);  in est_msr_info()
1211 	device_printf(dev, "Guessed high setting of %d MHz @ %d Mv\n", freq,  in est_msr_info()
1226 	device_printf(dev, "Guessed low setting of %d MHz @ %d Mv\n", freq,  in est_msr_info()
1286 		DELAY(100);  in est_get_current()