Lines Matching +full:bus +full:- +full:err
2 * SPDX-License-Identifier: BSD-2-Clause
11 #include <sys/bus.h>
21 #include <machine/bus.h>
114 {"starfive,jh7110-pcie", 1},
161 #define RD4(sc, reg) bus_read_4((sc)->reg_mem_res, (reg))
162 #define WR4(sc, reg, val) bus_write_4((sc)->reg_mem_res, (reg), (val))
165 jh7110_pcie_read_config(device_t dev, u_int bus, u_int slot, u_int func, in jh7110_pcie_read_config() argument
172 offset = PCIE_ADDR_OFFSET(bus, slot, func, reg); in jh7110_pcie_read_config()
175 if (bus == 0 && (offset == PCIR_BAR(0) || offset == PCIR_BAR(1))) in jh7110_pcie_read_config()
180 data = bus_read_1(sc->cfg_mem_res, offset); in jh7110_pcie_read_config()
183 data = le16toh(bus_read_2(sc->cfg_mem_res, offset)); in jh7110_pcie_read_config()
186 data = le32toh(bus_read_4(sc->cfg_mem_res, offset)); in jh7110_pcie_read_config()
196 jh7110_pcie_write_config(device_t dev, u_int bus, u_int slot, u_int func, in jh7110_pcie_write_config() argument
203 offset = PCIE_ADDR_OFFSET(bus, slot, func, reg); in jh7110_pcie_write_config()
206 if (bus == 0 && (offset == PCIR_BAR(0) || offset == PCIR_BAR(1))) in jh7110_pcie_write_config()
211 bus_write_1(sc->cfg_mem_res, offset, val); in jh7110_pcie_write_config()
214 bus_write_2(sc->cfg_mem_res, offset, htole16(val)); in jh7110_pcie_write_config()
217 bus_write_4(sc->cfg_mem_res, offset, htole32(val)); in jh7110_pcie_write_config()
231 int err, i; in jh7110_pcie_intr() local
234 tf = curthread->td_intr_frame; in jh7110_pcie_intr()
246 irq = &sc->isrcs[i]; in jh7110_pcie_intr()
247 err = intr_isrc_dispatch(&irq->isrc, tf); in jh7110_pcie_intr()
248 if (err != 0) in jh7110_pcie_intr()
249 device_printf(sc->dev, in jh7110_pcie_intr()
251 i, err); in jh7110_pcie_intr()
263 device_printf(sc->dev, "axi post error\n"); in jh7110_pcie_intr()
265 device_printf(sc->dev, "axi fetch error\n"); in jh7110_pcie_intr()
267 device_printf(sc->dev, "axi discard error\n"); in jh7110_pcie_intr()
269 device_printf(sc->dev, "pcie post error\n"); in jh7110_pcie_intr()
271 device_printf(sc->dev, "pcie fetch error\n"); in jh7110_pcie_intr()
273 device_printf(sc->dev, "pcie discard error\n"); in jh7110_pcie_intr()
275 device_printf(sc->dev, "pcie sys error\n"); in jh7110_pcie_intr()
283 jh7110_pcie_route_interrupt(device_t bus, device_t dev, int pin) in jh7110_pcie_route_interrupt() argument
288 sc = device_get_softc(bus); in jh7110_pcie_route_interrupt()
289 irq = intr_map_clone_irq(rman_get_start(sc->irq_res)); in jh7110_pcie_route_interrupt()
290 device_printf(bus, "route pin %d for device %d.%d to %u\n", in jh7110_pcie_route_interrupt()
310 mtx_lock(&sc->msi_mtx); in jh7110_pcie_msi_alloc_msi()
315 if (sc->isrcs[i].is_used == MSI_USED) in jh7110_pcie_msi_alloc_msi()
324 mtx_unlock(&sc->msi_mtx); in jh7110_pcie_msi_alloc_msi()
332 sc->isrcs[i + beg].is_used = MSI_USED; in jh7110_pcie_msi_alloc_msi()
333 srcs[i] = &(sc->isrcs[i + beg].isrc); in jh7110_pcie_msi_alloc_msi()
336 mtx_unlock(&sc->msi_mtx); in jh7110_pcie_msi_alloc_msi()
347 int err; in jh7110_pcie_alloc_msi() local
350 err = intr_alloc_msi(pci, child, msi_parent, count, maxcount, irqs); in jh7110_pcie_alloc_msi()
352 return (err); in jh7110_pcie_alloc_msi()
359 int err; in jh7110_pcie_release_msi() local
362 err = intr_release_msi(pci, child, msi_parent, count, irqs); in jh7110_pcie_release_msi()
364 return (err); in jh7110_pcie_release_msi()
374 *data = jhirq->irq; in jh7110_pcie_msi_map_msi()
385 int err; in jh7110_pcie_map_msi() local
389 err = intr_map_msi(pci, child, msi_parent, irq, addr, data); in jh7110_pcie_map_msi()
390 if (err != 0) { in jh7110_pcie_map_msi()
392 return (err); in jh7110_pcie_map_msi()
395 return (err); in jh7110_pcie_map_msi()
408 int err; in jh7110_pcie_release_msix() local
411 err = intr_release_msix(pci, child, msi_parent, irq); in jh7110_pcie_release_msix()
413 return (err); in jh7110_pcie_release_msix()
432 mtx_lock(&sc->msi_mtx); in jh7110_pcie_msi_release_msi()
437 KASSERT((irq->is_used & MSI_USED) == MSI_USED, in jh7110_pcie_msi_release_msi()
438 ("%s: Trying to release an unused MSI(-X) interrupt", in jh7110_pcie_msi_release_msi()
441 irq->is_used = 0; in jh7110_pcie_msi_release_msi()
444 mtx_unlock(&sc->msi_mtx); in jh7110_pcie_msi_release_msi()
463 irq = jhirq->irq; in jh7110_pcie_msi_mask()
465 reg = bus_read_4(sc->cfg_mem_res, sc->msi_mask_offset); in jh7110_pcie_msi_mask()
470 bus_write_4(sc->cfg_mem_res, sc->msi_mask_offset, reg); in jh7110_pcie_msi_mask()
503 irq = jhirq->irq; in jh7110_pcie_msi_pre_ithread()
518 if (sc->range_mem64.size != 0) { in jh7110_pcie_decode_ranges()
519 device_printf(sc->dev, in jh7110_pcie_decode_ranges()
523 sc->range_mem64 = ranges[i]; in jh7110_pcie_decode_ranges()
526 if (sc->range_mem32.size != 0) { in jh7110_pcie_decode_ranges()
527 device_printf(sc->dev, in jh7110_pcie_decode_ranges()
531 sc->range_mem32 = ranges[i]; in jh7110_pcie_decode_ranges()
543 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in jh7110_pcie_probe()
567 taddr_size = ilog2(win_size) - 1; in jh7110_pcie_set_atr()
593 int err; in jh7110_pcie_parse_fdt_resources() local
596 if (clk_get_by_ofw_name(sc->dev, 0, "noc", &sc->clk_noc) != 0) { in jh7110_pcie_parse_fdt_resources()
597 device_printf(sc->dev, "could not get noc clock\n"); in jh7110_pcie_parse_fdt_resources()
598 sc->clk_noc = NULL; in jh7110_pcie_parse_fdt_resources()
601 if (clk_get_by_ofw_name(sc->dev, 0, "tl", &sc->clk_tl) != 0) { in jh7110_pcie_parse_fdt_resources()
602 device_printf(sc->dev, "could not get tl clock\n"); in jh7110_pcie_parse_fdt_resources()
603 sc->clk_tl = NULL; in jh7110_pcie_parse_fdt_resources()
606 if (clk_get_by_ofw_name(sc->dev, 0, "axi_mst0", &sc->clk_axi) != 0) { in jh7110_pcie_parse_fdt_resources()
607 device_printf(sc->dev, "could not get axi_mst0 clock\n"); in jh7110_pcie_parse_fdt_resources()
608 sc->clk_axi = NULL; in jh7110_pcie_parse_fdt_resources()
611 if (clk_get_by_ofw_name(sc->dev, 0, "apb", &sc->clk_apb) != 0) { in jh7110_pcie_parse_fdt_resources()
612 device_printf(sc->dev, "could not get apb clock\n"); in jh7110_pcie_parse_fdt_resources()
613 sc->clk_apb = NULL; in jh7110_pcie_parse_fdt_resources()
618 err = hwreset_get_by_ofw_name(sc->dev, 0, "mst0", &sc->rst_mst0); in jh7110_pcie_parse_fdt_resources()
619 if (err != 0) { in jh7110_pcie_parse_fdt_resources()
620 device_printf(sc->dev, "cannot get 'rst_mst0' reset\n"); in jh7110_pcie_parse_fdt_resources()
623 err = hwreset_get_by_ofw_name(sc->dev, 0, "slv0", &sc->rst_slv0); in jh7110_pcie_parse_fdt_resources()
624 if (err != 0) { in jh7110_pcie_parse_fdt_resources()
625 device_printf(sc->dev, "cannot get 'rst_slv0' reset\n"); in jh7110_pcie_parse_fdt_resources()
628 err = hwreset_get_by_ofw_name(sc->dev, 0, "slv", &sc->rst_slv); in jh7110_pcie_parse_fdt_resources()
629 if (err != 0) { in jh7110_pcie_parse_fdt_resources()
630 device_printf(sc->dev, "cannot get 'rst_slv' reset\n"); in jh7110_pcie_parse_fdt_resources()
633 err = hwreset_get_by_ofw_name(sc->dev, 0, "brg", &sc->rst_brg); in jh7110_pcie_parse_fdt_resources()
634 if (err != 0) { in jh7110_pcie_parse_fdt_resources()
635 device_printf(sc->dev, "cannot get 'rst_brg' reset\n"); in jh7110_pcie_parse_fdt_resources()
638 err = hwreset_get_by_ofw_name(sc->dev, 0, "core", &sc->rst_core); in jh7110_pcie_parse_fdt_resources()
639 if (err != 0) { in jh7110_pcie_parse_fdt_resources()
640 device_printf(sc->dev, "cannot get 'rst_core' reset\n"); in jh7110_pcie_parse_fdt_resources()
643 err = hwreset_get_by_ofw_name(sc->dev, 0, "apb", &sc->rst_apb); in jh7110_pcie_parse_fdt_resources()
644 if (err != 0) { in jh7110_pcie_parse_fdt_resources()
645 device_printf(sc->dev, "cannot get 'rst_apb' reset\n"); in jh7110_pcie_parse_fdt_resources()
650 err = gpio_pin_get_by_ofw_property(sc->dev, sc->node, "perst-gpios", in jh7110_pcie_parse_fdt_resources()
651 &sc->perst_pin); in jh7110_pcie_parse_fdt_resources()
652 if (err != 0) { in jh7110_pcie_parse_fdt_resources()
653 device_printf(sc->dev, "Cannot get perst-gpios\n"); in jh7110_pcie_parse_fdt_resources()
658 if (syscon_get_by_ofw_property(sc->dev, sc->node, "starfive,stg-syscon", in jh7110_pcie_parse_fdt_resources()
659 &sc->stg_syscon) != 0) { in jh7110_pcie_parse_fdt_resources()
660 device_printf(sc->dev, "Cannot get starfive,stg-syscon\n"); in jh7110_pcie_parse_fdt_resources()
665 err = OF_getencprop(sc->node, "linux,pci-domain", &val, sizeof(val)); in jh7110_pcie_parse_fdt_resources()
666 if (err == -1) { in jh7110_pcie_parse_fdt_resources()
667 device_printf(sc->dev, in jh7110_pcie_parse_fdt_resources()
668 "Couldn't get pci-domain property, error: %d\n", err); in jh7110_pcie_parse_fdt_resources()
673 sc->stg_baddr = STG_PCIE0_BASE; in jh7110_pcie_parse_fdt_resources()
674 sc->msi_mask_offset = MSI_PCIE0_MASK_OFFSET; in jh7110_pcie_parse_fdt_resources()
676 sc->stg_baddr = STG_PCIE1_BASE; in jh7110_pcie_parse_fdt_resources()
677 sc->msi_mask_offset = MSI_PCIE1_MASK_OFFSET; in jh7110_pcie_parse_fdt_resources()
679 device_printf(sc->dev, "Error: an invalid pci-domain value\n"); in jh7110_pcie_parse_fdt_resources()
693 if (sc->irq_res != NULL) in jh7110_pcie_release_resources()
694 bus_teardown_intr(dev, sc->irq_res, sc->irq_cookie); in jh7110_pcie_release_resources()
695 if (sc->irq_res != NULL) in jh7110_pcie_release_resources()
696 bus_free_resource(dev, SYS_RES_IRQ, sc->irq_res); in jh7110_pcie_release_resources()
697 if (sc->reg_mem_res != NULL) in jh7110_pcie_release_resources()
698 bus_free_resource(dev, SYS_RES_MEMORY, sc->reg_mem_res); in jh7110_pcie_release_resources()
699 if (sc->cfg_mem_res != NULL) in jh7110_pcie_release_resources()
700 bus_free_resource(dev, SYS_RES_MEMORY, sc->cfg_mem_res); in jh7110_pcie_release_resources()
702 if (sc->clk_noc != NULL) in jh7110_pcie_release_resources()
703 clk_release(sc->clk_noc); in jh7110_pcie_release_resources()
704 if (sc->clk_tl != NULL) in jh7110_pcie_release_resources()
705 clk_release(sc->clk_tl); in jh7110_pcie_release_resources()
706 if (sc->clk_axi != NULL) in jh7110_pcie_release_resources()
707 clk_release(sc->clk_axi); in jh7110_pcie_release_resources()
708 if (sc->clk_apb != NULL) in jh7110_pcie_release_resources()
709 clk_release(sc->clk_apb); in jh7110_pcie_release_resources()
711 gpio_pin_release(sc->perst_pin); in jh7110_pcie_release_resources()
713 hwreset_release(sc->rst_mst0); in jh7110_pcie_release_resources()
714 hwreset_release(sc->rst_slv0); in jh7110_pcie_release_resources()
715 hwreset_release(sc->rst_slv); in jh7110_pcie_release_resources()
716 hwreset_release(sc->rst_brg); in jh7110_pcie_release_resources()
717 hwreset_release(sc->rst_core); in jh7110_pcie_release_resources()
718 hwreset_release(sc->rst_apb); in jh7110_pcie_release_resources()
720 mtx_destroy(&sc->msi_mtx); in jh7110_pcie_release_resources()
738 int i, err, rid, irq, win_idx = 0; in jh7110_pcie_attach() local
742 sc->dev = dev; in jh7110_pcie_attach()
743 sc->node = ofw_bus_get_node(dev); in jh7110_pcie_attach()
745 sc->irq_res = NULL; in jh7110_pcie_attach()
746 sc->reg_mem_res = NULL; in jh7110_pcie_attach()
747 sc->cfg_mem_res = NULL; in jh7110_pcie_attach()
748 sc->clk_noc = NULL; in jh7110_pcie_attach()
749 sc->clk_tl = NULL; in jh7110_pcie_attach()
750 sc->clk_axi = NULL; in jh7110_pcie_attach()
751 sc->clk_apb = NULL; in jh7110_pcie_attach()
753 mtx_init(&sc->msi_mtx, "jh7110_pcie, msi_mtx", NULL, MTX_DEF); in jh7110_pcie_attach()
756 err = ofw_bus_find_string_index(sc->node, "reg-names", "apb", &rid); in jh7110_pcie_attach()
757 if (err != 0) { in jh7110_pcie_attach()
762 sc->reg_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in jh7110_pcie_attach()
764 if (sc->reg_mem_res == NULL) { in jh7110_pcie_attach()
766 err = ENXIO; in jh7110_pcie_attach()
770 err = ofw_bus_find_string_index(sc->node, "reg-names", "cfg", &rid); in jh7110_pcie_attach()
771 if (err != 0) { in jh7110_pcie_attach()
773 err = ENXIO; in jh7110_pcie_attach()
777 sc->cfg_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in jh7110_pcie_attach()
779 if (sc->cfg_mem_res == NULL) { in jh7110_pcie_attach()
781 err = ENXIO; in jh7110_pcie_attach()
794 SYSCON_MODIFY_4(sc->stg_syscon, sc->stg_baddr + STG_RP_NEP_OFFSET, in jh7110_pcie_attach()
796 SYSCON_MODIFY_4(sc->stg_syscon, sc->stg_baddr + STG_AW_OFFSET, in jh7110_pcie_attach()
798 SYSCON_MODIFY_4(sc->stg_syscon, sc->stg_baddr + STG_AW_OFFSET, in jh7110_pcie_attach()
802 if (clk_enable(sc->clk_noc) != 0) { in jh7110_pcie_attach()
806 if (clk_enable(sc->clk_tl) != 0) { in jh7110_pcie_attach()
810 if (clk_enable(sc->clk_axi) != 0) { in jh7110_pcie_attach()
814 if (clk_enable(sc->clk_apb) != 0) { in jh7110_pcie_attach()
820 err = hwreset_deassert(sc->rst_mst0); in jh7110_pcie_attach()
821 if (err != 0) { in jh7110_pcie_attach()
822 device_printf(sc->dev, "cannot deassert 'mst0' reset\n"); in jh7110_pcie_attach()
825 err = hwreset_deassert(sc->rst_slv0); in jh7110_pcie_attach()
826 if (err != 0) { in jh7110_pcie_attach()
827 device_printf(sc->dev, "cannot deassert 'slv0' reset\n"); in jh7110_pcie_attach()
830 err = hwreset_deassert(sc->rst_slv); in jh7110_pcie_attach()
831 if (err != 0) { in jh7110_pcie_attach()
832 device_printf(sc->dev, "cannot deassert 'slv' reset\n"); in jh7110_pcie_attach()
835 err = hwreset_deassert(sc->rst_brg); in jh7110_pcie_attach()
836 if (err != 0) { in jh7110_pcie_attach()
837 device_printf(sc->dev, "cannot deassert 'brg' reset\n"); in jh7110_pcie_attach()
840 err = hwreset_deassert(sc->rst_core); in jh7110_pcie_attach()
841 if (err != 0) { in jh7110_pcie_attach()
842 device_printf(sc->dev, "cannot deassert 'core' reset\n"); in jh7110_pcie_attach()
845 err = hwreset_deassert(sc->rst_apb); in jh7110_pcie_attach()
846 if (err != 0) { in jh7110_pcie_attach()
847 device_printf(sc->dev, "cannot deassert 'apb' reset\n"); in jh7110_pcie_attach()
851 err = gpio_pin_set_active(sc->perst_pin, true); in jh7110_pcie_attach()
852 if (err != 0) { in jh7110_pcie_attach()
853 device_printf(dev, "Cannot activate gpio pin, error %d\n", err); in jh7110_pcie_attach()
857 /* Switching off PHY functions 1-3 */ in jh7110_pcie_attach()
859 SYSCON_MODIFY_4(sc->stg_syscon, sc->stg_baddr + STG_AR_OFFSET, in jh7110_pcie_attach()
862 SYSCON_MODIFY_4(sc->stg_syscon, sc->stg_baddr + STG_AW_OFFSET, in jh7110_pcie_attach()
869 SYSCON_MODIFY_4(sc->stg_syscon, sc->stg_baddr + STG_AR_OFFSET, in jh7110_pcie_attach()
871 SYSCON_MODIFY_4(sc->stg_syscon, sc->stg_baddr + STG_AW_OFFSET, in jh7110_pcie_attach()
892 /* Setting support for 64-bit pref window */ in jh7110_pcie_attach()
898 err = gpio_pin_set_active(sc->perst_pin, false); in jh7110_pcie_attach()
899 if (err != 0) { in jh7110_pcie_attach()
900 device_printf(dev, "Cannot deassert perst pin: %d\n", err); in jh7110_pcie_attach()
905 jh7110_pcie_set_atr(dev, rman_get_start(sc->cfg_mem_res), 0, in jh7110_pcie_attach()
906 rman_get_size(sc->cfg_mem_res), win_idx); in jh7110_pcie_attach()
908 err = ofw_pcib_init(dev); in jh7110_pcie_attach()
909 if (err != 0) { in jh7110_pcie_attach()
914 jh7110_pcie_decode_ranges(sc, sc->ofw_pci.sc_range, in jh7110_pcie_attach()
915 sc->ofw_pci.sc_nrange); in jh7110_pcie_attach()
917 jh7110_pcie_set_atr(dev, sc->range_mem32.pci, sc->range_mem32.pci, in jh7110_pcie_attach()
918 sc->range_mem32.size, ++win_idx); in jh7110_pcie_attach()
919 jh7110_pcie_set_atr(dev, sc->range_mem64.pci, sc->range_mem64.pci, in jh7110_pcie_attach()
920 sc->range_mem64.size, ++win_idx); in jh7110_pcie_attach()
924 val = SYSCON_READ_4(sc->stg_syscon, in jh7110_pcie_attach()
925 sc->stg_baddr + STG_LNKSTA_OFFSET); in jh7110_pcie_attach()
939 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); in jh7110_pcie_attach()
940 if (sc->irq_res == NULL) { in jh7110_pcie_attach()
942 err = ENXIO; in jh7110_pcie_attach()
946 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_BIO | INTR_MPSAFE, in jh7110_pcie_attach()
947 jh7110_pcie_intr, NULL, sc, &sc->irq_cookie); in jh7110_pcie_attach()
948 if (err != 0) { in jh7110_pcie_attach()
950 err = ENXIO; in jh7110_pcie_attach()
954 sc->isrcs = malloc(sizeof(*sc->isrcs) * MSI_COUNT, M_DEVBUF, in jh7110_pcie_attach()
958 device_get_nameunit(sc->dev)); in jh7110_pcie_attach()
961 sc->isrcs[irq].irq = irq; in jh7110_pcie_attach()
962 err = intr_isrc_register(&sc->isrcs[irq].isrc, sc->dev, 0, in jh7110_pcie_attach()
964 if (err != 0) { in jh7110_pcie_attach()
971 xref = OF_xref_from_node(sc->node); in jh7110_pcie_attach()
974 err = intr_msi_register(dev, xref); in jh7110_pcie_attach()
975 if (err != 0) { in jh7110_pcie_attach()
990 return (err); in jh7110_pcie_attach()
1011 /* MSI/MSI-X */
1025 /* OFW bus interface */