1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
91 	bas->regiowidth = 4;  in sfuart_probe()
104 	/* Enable RX and configure the watermark so that we get an interrupt  in sfuart_init()
110 	/* Enable TX and configure the watermark so that we get an interrupt  in sfuart_init()
140 	 * we've configured the watermark to be 0 and that interrupts are off  in sfuart_rxready()
141 	 * when using the low-level console function, and read the interrupt  in sfuart_rxready()
172 	error = sfuart_probe(&sc->sc_bas);  in sfuart_bus_probe()
176 	sc->sc_rxfifosz = SFUART_RX_FIFO_DEPTH;  in sfuart_bus_probe()
177 	sc->sc_txfifosz = SFUART_TX_FIFO_DEPTH;  in sfuart_bus_probe()
178 	sc->sc_hwiflow = 0;  in sfuart_bus_probe()
179 	sc->sc_hwoflow = 0;  in sfuart_bus_probe()
181 	device_set_desc(sc->sc_dev, "SiFive UART");  in sfuart_bus_probe()
196 	bas = &sc->sc_bas;  in sfuart_bus_attach()
198 	error = clk_get_by_ofw_index(sc->sc_dev, 0, 0, &sfsc->clk);  in sfuart_bus_attach()
200 		device_printf(sc->sc_dev, "couldn't allocate clock\n");  in sfuart_bus_attach()
204 	error = clk_enable(sfsc->clk);  in sfuart_bus_attach()
206 		device_printf(sc->sc_dev, "couldn't enable clock\n");  in sfuart_bus_attach()
210 	error = clk_get_freq(sfsc->clk, &freq);  in sfuart_bus_attach()
212 		clk_disable(sfsc->clk);  in sfuart_bus_attach()
213 		device_printf(sc->sc_dev, "couldn't get clock frequency\n");  in sfuart_bus_attach()
217 	bas->rclk = freq;  in sfuart_bus_attach()
219 	/* Enable RX/RX */  in sfuart_bus_attach()
228 	/* Enable RX interrupt */  in sfuart_bus_attach()
241 	bas = &sc->sc_bas;  in sfuart_bus_detach()
243 	/* Disable RX/TX */  in sfuart_bus_detach()
250 	clk_disable(sfsc->clk);  in sfuart_bus_detach()
261 	bas = &sc->sc_bas;  in sfuart_bus_flush()
262 	uart_lock(sc->sc_hwmtx);  in sfuart_bus_flush()
275 	uart_unlock(sc->sc_hwmtx);  in sfuart_bus_flush()
294 		old = sc->sc_hwsig;  in sfuart_bus_getsig()
300 	} while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));  in sfuart_bus_getsig()
311 		old = sc->sc_hwsig;  in sfuart_bus_setsig()
319 	 } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));  in sfuart_bus_setsig()
331 	bas = &sc->sc_bas;  in sfuart_bus_ioctl()
333 	uart_lock(sc->sc_hwmtx);  in sfuart_bus_ioctl()
343 		*(int*)data = bas->rclk / (reg + 1);  in sfuart_bus_ioctl()
351 	uart_unlock(sc->sc_hwmtx);  in sfuart_bus_ioctl()
363 	bas = &sc->sc_bas;  in sfuart_bus_ipend()
364 	uart_lock(sc->sc_hwmtx);  in sfuart_bus_ipend()
382 	uart_unlock(sc->sc_hwmtx);  in sfuart_bus_ipend()
394 	bas = &sc->sc_bas;  in sfuart_bus_param()
402 	uart_lock(sc->sc_hwmtx);  in sfuart_bus_param()
410 		uart_unlock(sc->sc_hwmtx);  in sfuart_bus_param()
414 	if (baudrate > 0 && bas->rclk != 0) {  in sfuart_bus_param()
415 		reg = (bas->rclk / baudrate) - 1;  in sfuart_bus_param()
419 	uart_unlock(sc->sc_hwmtx);  in sfuart_bus_param()
429 	bas = &sc->sc_bas;  in sfuart_bus_receive()
430 	uart_lock(sc->sc_hwmtx);  in sfuart_bus_receive()
435 			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;  in sfuart_bus_receive()
444 	uart_unlock(sc->sc_hwmtx);  in sfuart_bus_receive()
456 	bas = &sc->sc_bas;  in sfuart_bus_transmit()
457 	uart_lock(sc->sc_hwmtx);  in sfuart_bus_transmit()
463 	for (i = 0; i < sc->sc_txdatasz; i++)  in sfuart_bus_transmit()
464 		sfuart_putc(bas, sc->sc_txbuf[i]);  in sfuart_bus_transmit()
466 	sc->sc_txbusy = 1;  in sfuart_bus_transmit()
468 	uart_unlock(sc->sc_hwmtx);  in sfuart_bus_transmit()
479 	bas = &sc->sc_bas;  in sfuart_bus_grab()
480 	uart_lock(sc->sc_hwmtx);  in sfuart_bus_grab()
486 	uart_unlock(sc->sc_hwmtx);  in sfuart_bus_grab()
495 	bas = &sc->sc_bas;  in sfuart_bus_ungrab()
496 	uart_lock(sc->sc_hwmtx);  in sfuart_bus_ungrab()
502 	uart_unlock(sc->sc_hwmtx);  in sfuart_bus_ungrab()