Lines Matching +full:1 +full:gib
17 * 1. Redistributions of source code must retain the above copyright
45 /* Level 0 table, 512GiB per entry, SV48 only */
47 #define L0_SIZE (1UL << L0_SHIFT)
48 #define L0_OFFSET (L0_SIZE - 1)
50 /* Level 1 table, 1GiB per entry */
52 #define L1_SIZE (1UL << L1_SHIFT)
53 #define L1_OFFSET (L1_SIZE - 1)
57 #define L2_SIZE (1UL << L2_SHIFT)
58 #define L2_OFFSET (L2_SIZE - 1)
62 #define L3_SIZE (1UL << L3_SHIFT)
63 #define L3_OFFSET (L3_SIZE - 1)
66 #define Ln_ENTRIES (1 << Ln_ENTRIES_SHIFT)
67 #define Ln_ADDR_MASK (Ln_ENTRIES - 1)
70 #define PTE_SW_MANAGED (1 << 9)
71 #define PTE_SW_WIRED (1 << 8)
72 #define PTE_D (1 << 7) /* Dirty */
73 #define PTE_A (1 << 6) /* Accessed */
74 #define PTE_G (1 << 5) /* Global */
75 #define PTE_U (1 << 4) /* User */
76 #define PTE_X (1 << 3) /* Execute */
77 #define PTE_W (1 << 2) /* Write */
78 #define PTE_R (1 << 1) /* Read */
79 #define PTE_V (1 << 0) /* Valid */
102 #define PTE_MA_NC (1ul << PTE_MA_SHIFT)
112 * bit 63: Memory Ordering (1 = strongly ordered (device), 0 = default)