1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
4  * Copyright (C) 2008-2010 Nathan Whitehorn
5  * All rights reserved.
81 			    int count, int maxcount, int *irqs);
83 			    int count, int *irqs);
163 	if (strcmp(compatible, "u3-ht") != 0)  in cpcht_probe()
185 		sc->pci_sc.sc_quirks = OFW_PCI_QUIRK_RANGES_ON_CHILDREN;  in cpcht_attach()
186 	sc->sc_populated_slots = 0;  in cpcht_attach()
187 	sc->sc_data = (vm_offset_t)pmap_mapdev(reg[1], reg[2]);  in cpcht_attach()
190 	 * Set up the resource manager and the HT->MPIC mapping. For cpcht,  in cpcht_attach()
197 	rman_manage_region(&sc->pci_sc.sc_io_rman, 0, CPCHT_IOPORT_SIZE - 1);  in cpcht_attach()
200 	bzero(sc->htirq_map, sizeof(sc->htirq_map));  in cpcht_attach()
201 	mtx_init(&sc->htirq_mtx, "cpcht irq", NULL, MTX_DEF);  in cpcht_attach()
203 		sc->htirq_map[i].irq_type = IRQ_INTERNAL;  in cpcht_attach()
208 	cpcht_irqmap = sc->htirq_map;  in cpcht_attach()
224 	if (OF_getencprop(child, "reg", (pcell_t *)&pcir, sizeof(pcir)) == -1)  in cpcht_configure_htbridge()
235 	sc->sc_populated_slots |= (1 << s);  in cpcht_configure_htbridge()
238 	 * Next build up any HT->MPIC mappings for this sub-bus. One would  in cpcht_configure_htbridge()
274 		device_printf(dev, "%d HT IRQs on device %d.%d\n", nirq, s, f);  in cpcht_configure_htbridge()
288 			sc->htirq_map[irq].irq_type = IRQ_HT;  in cpcht_configure_htbridge()
289 			sc->htirq_map[irq].ht_source = i;  in cpcht_configure_htbridge()
290 			sc->htirq_map[irq].ht_base = sc->sc_data +   in cpcht_configure_htbridge()
295 			sc->htirq_map[irq].eoi_data =  in cpcht_configure_htbridge()
300 			 * Apple uses a non-compliant IO/APIC that differs  in cpcht_configure_htbridge()
307 				sc->htirq_map[irq].apple_eoi =   in cpcht_configure_htbridge()
308 				 (sc->htirq_map[irq].ht_base - ptr) + 0x60;  in cpcht_configure_htbridge()
321 	caoff = sc->sc_data +   in cpcht_read_config()
324 	if (bus == 0 && (!(sc->sc_populated_slots & (1 << slot)) || func > 0))  in cpcht_read_config()
353 	caoff = sc->sc_data +   in cpcht_write_config()
356 	if (bus == 0 && (!(sc->sc_populated_slots & (1 << slot)) || func > 0))  in cpcht_write_config()
383     int *irqs)  in cpcht_alloc_msi()  argument
395 	mtx_lock(&sc->htirq_mtx);  in cpcht_alloc_msi()
396 	for (i = 8; i < 124 - count; i++) {  in cpcht_alloc_msi()
398 			if (sc->htirq_map[i+j].irq_type != IRQ_NONE)  in cpcht_alloc_msi()
408 		mtx_unlock(&sc->htirq_mtx);  in cpcht_alloc_msi()
413 		irqs[j] = MAP_IRQ(cpcht_msipic, i+j);  in cpcht_alloc_msi()
414 		sc->htirq_map[i+j].irq_type = IRQ_MSI;  in cpcht_alloc_msi()
416 	mtx_unlock(&sc->htirq_mtx);  in cpcht_alloc_msi()
422 cpcht_release_msi(device_t dev, device_t child, int count, int *irqs)  in cpcht_release_msi()  argument
429 	mtx_lock(&sc->htirq_mtx);  in cpcht_release_msi()
431 		sc->htirq_map[irqs[i] & 0xff].irq_type = IRQ_NONE;  in cpcht_release_msi()
432 	mtx_unlock(&sc->htirq_mtx);  in cpcht_release_msi()
449 	mtx_lock(&sc->htirq_mtx);  in cpcht_alloc_msix()
451 		if (sc->htirq_map[i].irq_type == IRQ_NONE) {  in cpcht_alloc_msix()
452 			sc->htirq_map[i].irq_type = IRQ_MSI;  in cpcht_alloc_msix()
455 			mtx_unlock(&sc->htirq_mtx);  in cpcht_alloc_msix()
459 	mtx_unlock(&sc->htirq_mtx);  in cpcht_alloc_msix()
471 	mtx_lock(&sc->htirq_mtx);  in cpcht_release_msix()
472 	sc->htirq_map[irq & 0xff].irq_type = IRQ_NONE;  in cpcht_release_msix()
473 	mtx_unlock(&sc->htirq_mtx);  in cpcht_release_msix()
489 		ht = &dinfo->cfg.ht;  in cpcht_map_msi()
498 	*addr = ht->ht_msiaddr;  in cpcht_map_msi()
555 	if (strcmp(type, "open-pic") != 0)  in openpic_cpcht_probe()
575 	 * The HT APIC stuff is not thread-safe, so we need a mutex to  in openpic_cpcht_attach()
579 	mtx_init(&sc->sc_ht_mtx, "htpic", NULL, MTX_SPIN);  in openpic_cpcht_attach()
582 	 * Interrupts 0-3 are internally sourced and are level triggered  in openpic_cpcht_attach()
583 	 * active low. Interrupts 4-123 are connected to a pulse generator  in openpic_cpcht_attach()
584 	 * and should be programmed as edge triggered low-to-high.  in openpic_cpcht_attach()
615 	 * settings need to be negotiated with the remote IO-APIC on the HT  in openpic_cpcht_config()
623 		mtx_lock_spin(&sc->sc_ht_mtx);  in openpic_cpcht_config()
645 		mtx_unlock_spin(&sc->sc_ht_mtx);  in openpic_cpcht_config()
661 		mtx_lock_spin(&sc->sc_ht_mtx);  in openpic_cpcht_enable()
672 		mtx_unlock_spin(&sc->sc_ht_mtx);  in openpic_cpcht_enable()
690 		mtx_lock_spin(&sc->sc_ht_mtx);  in openpic_cpcht_unmask()
701 		mtx_unlock_spin(&sc->sc_ht_mtx);  in openpic_cpcht_unmask()
727 			mtx_lock_spin(&sc->sc_ht_mtx);  in openpic_cpcht_eoi()
734 			mtx_unlock_spin(&sc->sc_ht_mtx);  in openpic_cpcht_eoi()