1 /*-
2  * SPDX-License-Identifier: BSD-3-Clause
31  * Common routines for the DMA engine on both the Apple Kauai and MacIO
49 #include <dev/ata/ata-all.h>
50 #include <dev/ata/ata-pci.h>
58 	int write;  member
66 	struct ata_dbdma_channel *sc = arg->sc;  in ata_dbdma_setprd()
71 	mtx_lock(&sc->dbdma_mtx);  in ata_dbdma_setprd()
73 	prev_stop = sc->next_dma_slot-1;  in ata_dbdma_setprd()
79 		if (sc->next_dma_slot == 0xff)  in ata_dbdma_setprd()
84 		if (arg->write) {  in ata_dbdma_setprd()
92 		dbdma_insert_command(sc->dbdma, sc->next_dma_slot++,  in ata_dbdma_setprd()
97 			sc->next_dma_slot = 0;  in ata_dbdma_setprd()
104 	if (sc->next_dma_slot == 0xff) {  in ata_dbdma_setprd()
105 		dbdma_insert_branch(sc->dbdma, sc->next_dma_slot, 0);  in ata_dbdma_setprd()
106 		sc->next_dma_slot = 0;  in ata_dbdma_setprd()
110 	dbdma_insert_command(sc->dbdma, sc->next_dma_slot++,  in ata_dbdma_setprd()
113 	dbdma_insert_stop(sc->dbdma, sc->next_dma_slot++);  in ata_dbdma_setprd()
114 	dbdma_insert_nop(sc->dbdma, prev_stop);  in ata_dbdma_setprd()
116 	dbdma_sync_commands(sc->dbdma, BUS_DMASYNC_PREWRITE);  in ata_dbdma_setprd()
118 	mtx_unlock(&sc->dbdma_mtx);  in ata_dbdma_setprd()
120 	arg->nsegs = nsegs;  in ata_dbdma_setprd()
129 	if (sc->sc_ch.dma.flags & ATA_DMA_ACTIVE) {  in ata_dbdma_status()
130 		return (!(dbdma_get_chan_status(sc->dbdma) &   in ata_dbdma_status()
145 	struct ata_dbdma_channel *sc = device_get_softc(request->parent);  in ata_dbdma_start()
147 	sc->sc_ch.dma.flags |= ATA_DMA_ACTIVE;  in ata_dbdma_start()
148 	dbdma_wake(sc->dbdma);  in ata_dbdma_start()
157 	mtx_lock(&sc->dbdma_mtx);  in ata_dbdma_reset()
159 	dbdma_stop(sc->dbdma);  in ata_dbdma_reset()
160 	dbdma_insert_stop(sc->dbdma, 0);  in ata_dbdma_reset()
161 	sc->next_dma_slot=1;  in ata_dbdma_reset()
162 	dbdma_set_current_cmd(sc->dbdma, 0);  in ata_dbdma_reset()
164 	sc->sc_ch.dma.flags &= ~ATA_DMA_ACTIVE;  in ata_dbdma_reset()
166 	mtx_unlock(&sc->dbdma_mtx);  in ata_dbdma_reset()
172 	struct ata_dbdma_channel *sc = device_get_softc(request->parent);  in ata_dbdma_stop()
176 	status = dbdma_get_chan_status(sc->dbdma);  in ata_dbdma_stop()
178 	dbdma_pause(sc->dbdma);  in ata_dbdma_stop()
179 	sc->sc_ch.dma.flags &= ~ATA_DMA_ACTIVE;  in ata_dbdma_stop()
182 		device_printf(request->parent,"DBDMA dead, resetting "  in ata_dbdma_stop()
184 		ata_dbdma_reset(request->parent);  in ata_dbdma_stop()
189 		device_printf(request->parent,"DBDMA confused, stop called "  in ata_dbdma_stop()
195 		device_printf(request->parent,"DBDMA channel stopped "  in ata_dbdma_stop()
205 	struct ata_channel *ch = device_get_softc(request->parent);  in ata_dbdma_load()
210 	args.sc = device_get_softc(request->parent);  in ata_dbdma_load()
211 	args.write = !(request->flags & ATA_R_READ);  in ata_dbdma_load()
213 	if (!request->bytecount) {  in ata_dbdma_load()
214 		device_printf(request->dev,  in ata_dbdma_load()
215 		    "FAILURE - zero length DMA transfer attempted\n");  in ata_dbdma_load()
218 	if (((uintptr_t)(request->data) & (ch->dma.alignment - 1)) ||  in ata_dbdma_load()
219 	    (request->bytecount & (ch->dma.alignment - 1))) {  in ata_dbdma_load()
220 		device_printf(request->dev,  in ata_dbdma_load()
221 		    "FAILURE - non aligned DMA transfer attempted\n");  in ata_dbdma_load()
224 	if (request->bytecount > ch->dma.max_iosize) {  in ata_dbdma_load()
225 		device_printf(request->dev,  in ata_dbdma_load()
226 		    "FAILURE - oversized DMA transfer attempt %d > %d\n",  in ata_dbdma_load()
227 		    request->bytecount, ch->dma.max_iosize);  in ata_dbdma_load()
231 	request->dma = &ch->dma.slot[0];  in ata_dbdma_load()
233 	if ((error = bus_dmamap_load(request->dma->data_tag,   in ata_dbdma_load()
234 	    request->dma->data_map, request->data, request->bytecount,  in ata_dbdma_load()
236 		device_printf(request->dev, "FAILURE - load data\n");  in ata_dbdma_load()
243 	bus_dmamap_sync(request->dma->sg_tag, request->dma->sg_map,  in ata_dbdma_load()
245 	bus_dmamap_sync(request->dma->data_tag, request->dma->data_map,  in ata_dbdma_load()
246 	    (request->flags & ATA_R_READ) ?  in ata_dbdma_load()
252 	ch->dma.unload(request);  in ata_dbdma_load()
261 	dbdma_allocate_channel(sc->dbdma_regs, sc->dbdma_offset,  in ata_dbdma_dmainit()
262 	    bus_get_dma_tag(dev), 256, &sc->dbdma);  in ata_dbdma_dmainit()
264 	dbdma_set_wait_selector(sc->dbdma,1 << 7, 1 << 7);  in ata_dbdma_dmainit()
266 	dbdma_insert_stop(sc->dbdma,0);  in ata_dbdma_dmainit()
267 	sc->next_dma_slot=1;  in ata_dbdma_dmainit()
269 	sc->sc_ch.dma.start = ata_dbdma_start;  in ata_dbdma_dmainit()
270 	sc->sc_ch.dma.stop = ata_dbdma_stop;  in ata_dbdma_dmainit()
271 	sc->sc_ch.dma.load = ata_dbdma_load;  in ata_dbdma_dmainit()
272 	sc->sc_ch.dma.reset = ata_dbdma_reset;  in ata_dbdma_dmainit()
278 	sc->sc_ch.dma.segsize = 126 * DEV_BSIZE;  in ata_dbdma_dmainit()
281 	sc->sc_ch.hw.status = ata_dbdma_status;  in ata_dbdma_dmainit()
283 	mtx_init(&sc->dbdma_mtx, "ATA DBDMA", NULL, MTX_DEF);  in ata_dbdma_dmainit()