Lines Matching +full:non +full:- +full:sticky
3 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
69 * 2 bits (a la fpu_shr(), but we do not bother with fp->fp_sticky).
72 * Note that we may leave the value 2.0 in fp->fp_mant; it is the caller's
82 m0 = fp->fp_mant[0]; in round()
83 m1 = fp->fp_mant[1]; in round()
84 m2 = fp->fp_mant[2]; in round()
85 m3 = fp->fp_mant[3]; in round()
87 s = fp->fp_sticky; in round()
90 m3 = (m3 >> FP_NG) | (m2 << (32 - FP_NG)); in round()
91 m2 = (m2 >> FP_NG) | (m1 << (32 - FP_NG)); in round()
92 m1 = (m1 >> FP_NG) | (m0 << (32 - FP_NG)); in round()
98 fe->fe_cx |= FPSCR_XX|FPSCR_FI; /* inexact */ in round()
101 switch ((fe->fe_fpscr) & FPSCR_RN) { in round()
106 * but round & sticky both clear, then we want to round in round()
111 if ((gr & 1) || fp->fp_sticky || (m3 & 1)) in round()
120 /* Round towards -Inf: up if negative, down if positive. */ in round()
121 if (fp->fp_sign) in round()
127 if (!fp->fp_sign) in round()
133 fe->fe_cx |= FPSCR_FR; in round()
139 fp->fp_mant[0] = m0; in round()
140 fp->fp_mant[1] = m1; in round()
141 fp->fp_mant[2] = m2; in round()
142 fp->fp_mant[3] = m3; in round()
146 fp->fp_mant[0] = m0; in round()
147 fp->fp_mant[1] = m1; in round()
148 fp->fp_mant[2] = m2; in round()
149 fp->fp_mant[3] = m3; in round()
154 * For overflow: return true if overflow is to go to +/-Inf, according
164 switch ((fe->fe_fpscr) & FPSCR_RN) { in toinf()
178 case FP_RM: /* toward -Inf iff negative */ in toinf()
183 fe->fe_cx |= FPSCR_OX; in toinf()
188 * fpn -> int (int value returned as return value).
199 sign = fp->fp_sign; in fpu_ftoi()
200 switch (fp->fp_class) { in fpu_ftoi()
208 * shifting any guard and round bits out into the sticky in fpu_ftoi()
210 * inexact exception if sticky is set (see round()). in fpu_ftoi()
215 if ((exp = fp->fp_exp) >= 32) in fpu_ftoi()
218 if (fpu_shr(fp, FP_NMANT - 1 - exp) != 0) in fpu_ftoi()
219 fe->fe_cx |= FPSCR_UX; in fpu_ftoi()
220 i = fp->fp_mant[3]; in fpu_ftoi()
223 return (sign ? -i : i); in fpu_ftoi()
229 fe->fe_cx |= FPSCR_VXCVI; in fpu_ftoi()
234 * fpn -> extended int (high bits of int value returned as return value).
245 sign = fp->fp_sign; in fpu_ftox()
246 switch (fp->fp_class) { in fpu_ftox()
255 * shifting any guard and round bits out into the sticky in fpu_ftox()
257 * inexact exception if sticky is set (see round()). in fpu_ftox()
262 if ((exp = fp->fp_exp) >= 64) in fpu_ftox()
265 if (fpu_shr(fp, FP_NMANT - 1 - exp) != 0) in fpu_ftox()
266 fe->fe_cx |= FPSCR_UX; in fpu_ftox()
267 i = ((u_int64_t)fp->fp_mant[2]<<32)|fp->fp_mant[3]; in fpu_ftox()
270 return (sign ? -i : i); in fpu_ftox()
276 fe->fe_cx |= FPSCR_VXCVI; in fpu_ftox()
281 * fpn -> single (32 bit single returned as return value).
282 * We assume <= 29 bits in a single-precision fraction (1.f part).
287 u_int sign = fp->fp_sign << 31; in fpu_ftos()
291 #define SNG_MASK (SNG_EXP(1) - 1) /* mask for fraction */ in fpu_ftos()
293 /* Take care of non-numbers first. */ in fpu_ftos()
297 * Note that fp->fp_mant[0] has the quiet bit set, in fpu_ftos()
300 (void) fpu_shr(fp, FP_NMANT - 1 - SNG_FRACBITS); in fpu_ftos()
312 * single-precision range. If the number is subnormal, move in fpu_ftos()
330 if ((exp = fp->fp_exp + SNG_EXP_BIAS) <= 0) { /* subnormal */ in fpu_ftos()
331 /* -NG for g,r; -SNG_FRACBITS-exp for fraction */ in fpu_ftos()
332 (void) fpu_shr(fp, FP_NMANT - FP_NG - SNG_FRACBITS - exp); in fpu_ftos()
333 if (round(fe, fp) && fp->fp_mant[3] == SNG_EXP(1)) in fpu_ftos()
335 if ((fe->fe_cx & FPSCR_FI) || in fpu_ftos()
336 (fe->fe_fpscr & FPSCR_UX)) in fpu_ftos()
337 fe->fe_cx |= FPSCR_UX; in fpu_ftos()
338 return (sign | SNG_EXP(0) | fp->fp_mant[3]); in fpu_ftos()
340 /* -FP_NG for g,r; -1 for implied 1; -SNG_FRACBITS for fraction */ in fpu_ftos()
341 (void) fpu_shr(fp, FP_NMANT - FP_NG - 1 - SNG_FRACBITS); in fpu_ftos()
343 if ((fp->fp_mant[3] & SNG_EXP(1 << FP_NG)) == 0) in fpu_ftos()
346 if (round(fe, fp) && fp->fp_mant[3] == SNG_EXP(2)) in fpu_ftos()
352 return (sign | SNG_EXP(SNG_EXP_INFNAN - 1) | SNG_MASK); in fpu_ftos()
356 return (sign | SNG_EXP(exp) | (fp->fp_mant[3] & SNG_MASK)); in fpu_ftos()
360 * fpn -> double (32 bit high-order result returned; 32-bit low order result
368 u_int sign = fp->fp_sign << 31; in fpu_ftod()
372 #define DBL_MASK (DBL_EXP(1) - 1) in fpu_ftod()
375 (void) fpu_shr(fp, FP_NMANT - 1 - DBL_FRACBITS); in fpu_ftod()
388 if ((exp = fp->fp_exp + DBL_EXP_BIAS) <= 0) { in fpu_ftod()
389 (void) fpu_shr(fp, FP_NMANT - FP_NG - DBL_FRACBITS - exp); in fpu_ftod()
390 if (round(fe, fp) && fp->fp_mant[2] == DBL_EXP(1)) { in fpu_ftod()
394 if ((fe->fe_cx & FPSCR_FI) || in fpu_ftod()
395 (fe->fe_fpscr & FPSCR_UX)) in fpu_ftod()
396 fe->fe_cx |= FPSCR_UX; in fpu_ftod()
400 (void) fpu_shr(fp, FP_NMANT - FP_NG - 1 - DBL_FRACBITS); in fpu_ftod()
401 if (round(fe, fp) && fp->fp_mant[2] == DBL_EXP(2)) in fpu_ftod()
404 fe->fe_cx |= FPSCR_OX | FPSCR_UX; in fpu_ftod()
413 res[1] = fp->fp_mant[3]; in fpu_ftod()
414 return (sign | DBL_EXP(exp) | (fp->fp_mant[2] & DBL_MASK)); in fpu_ftod()