Lines Matching refs:r21

210 	std	%r21, FRAME_21+CALLSIZE(r);				\
240 	ld	%r21, FRAME_21+CALLSIZE(r);				\
341 	std	%r21, (TLBSAVE_BOOKE_R21)(br);				\
354 	ld	%r21, (TLBSAVE_BOOKE_R21)(br);				\
438 	LOAD	%r21, PC_CURTHREAD(%r20);				\
446 	CMPL	cr0, %r21, %r23;					\
450 	STOREX	%r21, 0, %r22;						\
454 	lwz	%r21, RES_RECURSE(%r22);				\
455 	addi	%r21, %r21, 1;						\
456 	stw	%r21, RES_RECURSE(%r22);				\
462 	LOAD	%r21, PC_CURTHREAD(%r20);				\
705 	LOAD_ADDR(%r21, VM_MAXUSER_ADDRESS)
706 	CMPL	cr0, %r31, %r21
710 	mfsrr1	%r21
711 	mtcr	%r21
715 	srdi	%r21, %r31, 48
716 	cmpldi	cr0, %r21, VM_MIN_KERNEL_ADDRESS@highest
718 	lis	%r21, VM_MIN_KERNEL_ADDRESS@h
719 	cmplw	cr0, %r31, %r21
731 1:	mflr	%r21
732 	LOAD	%r26, 0(%r21)
733 	add	%r26, %r21, %r26	/* kernel_pmap_store in r26 */
736 	li	%r21, 0
737 	rlwimi	%r28, %r21, 0, 8, 15	/* clear TID bits */
801 	rldicl  %r21, %r31, (64 - PG_ROOT_L), (64 - PG_ROOT_NUM) /* pp2d offset */
802 	slwi    %r21, %r21, PG_ROOT_ENTRY_SHIFT	/* multiply by pp2d entry size */
804 	ldx	%r25, %r25, %r21		/* get pdir address, i.e.  pmap->pm_pp2d[pp2d_idx] * */
809 	rldicl  %r21, %r31, (64 - PDIR_L1_L), (64 - PDIR_L1_NUM) /* pp2d offset */
810 	slwi    %r21, %r21, PDIR_L1_ENTRY_SHIFT	/* multiply by pp2d entry size */
811 	ldx	%r25, %r25, %r21		/* get pdir address, i.e.  pmap->pm_pp2d[pp2d_idx] * */
816 	rldicl  %r21, %r31, (64 - PDIR_L), (64 - PDIR_NUM)	/* pdir offset */
817 	slwi    %r21, %r21, PDIR_ENTRY_SHIFT	/* multiply by pdir entry size */
818 	ldx	%r25, %r25, %r21		/* get ptbl address, i.e.  pmap->pm_pp2d[pp2d_idx][pdir_idx] */
823 	rldicl  %r21, %r31, (64 - PTBL_L), (64 - PTBL_NUM) /* ptbl offset */
824 	slwi    %r21, %r21, PTBL_ENTRY_SHIFT   /* multiply by pte entry size */
827 	srwi	%r21, %r31, PDIR_SHIFT		/* pdir offset */
828 	slwi	%r21, %r21, PDIR_ENTRY_SHIFT	/* multiply by pdir entry size */
835 	lwzx	%r25, %r25, %r21	/* offset within pm_pdir[] table */
839 	lis	%r21, PTBL_MASK@h
840 	ori	%r21, %r21, PTBL_MASK@l
841 	and	%r21, %r21, %r31
844 	srwi	%r21, %r21, (PTBL_SHIFT - PTBL_ENTRY_SHIFT)
847 	add	%r25, %r25, %r21		/* address of pte entry */
852 	lwz	%r21, PTE_FLAGS(%r25)
853 	andi.	%r21, %r21, PTE_VALID@l
883 	lwarx	%r21, %r23, %r25		/* get pte->flags */
884 	oris	%r21, %r21, PTE_REFERENCED@h	/* set referenced bit */
886 	andi.	%r22, %r21, (PTE_SW | PTE_UW)@l	/* check if writable */
888 	ori	%r21, %r21, PTE_MODIFIED@l	/* set modified bit */
890 	stwcx.	%r21, %r23, %r25		/* write it back */
894 	rlwimi	%r27, %r21, 13, 27, 30		/* insert WIMG bits from pte */
902 	rlwimi	%r22, %r21, 30, 26, 31		/* insert protection bits from pte */
906 	rlwimi	%r22, %r21, 30, 26, 31		/* insert protection bits from pte */
907 	rlwimi	%r22, %r21, 20, 12, 19		/* insert lower 8 RPN bits to MAS3 */
943 	mfsrr1	%r21
944 	mtcr	%r21