Lines Matching full:csr
56 uint32_t csr; in booke_enable_l1_cache() local
59 csr = mfspr(SPR_L1CSR0); in booke_enable_l1_cache()
60 if ((csr & L1CSR0_DCE) == 0) { in booke_enable_l1_cache()
65 csr = mfspr(SPR_L1CSR0); in booke_enable_l1_cache()
66 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0) in booke_enable_l1_cache()
68 (csr & L1CSR0_DCE) ? "en" : "dis"); in booke_enable_l1_cache()
71 csr = mfspr(SPR_L1CSR1); in booke_enable_l1_cache()
72 if ((csr & L1CSR1_ICE) == 0) { in booke_enable_l1_cache()
77 csr = mfspr(SPR_L1CSR1); in booke_enable_l1_cache()
78 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0) in booke_enable_l1_cache()
80 (csr & L1CSR1_ICE) ? "en" : "dis"); in booke_enable_l1_cache()
86 uint32_t csr; in booke_enable_l2_cache() local
91 csr = mfspr(SPR_L2CSR0); in booke_enable_l2_cache()
102 if (mfspr(SPR_L2CFG0) != 0 && (csr & L2CSR0_L2E) == 0) { in booke_enable_l2_cache()
107 csr = mfspr(SPR_L2CSR0); in booke_enable_l2_cache()
108 if ((boothowto & RB_VERBOSE) != 0 || (csr & L2CSR0_L2E) == 0) in booke_enable_l2_cache()
110 (csr & L2CSR0_L2E) ? "en" : "dis"); in booke_enable_l2_cache()
117 uint32_t csr; in booke_enable_bpred() local
120 csr = mfspr(SPR_BUCSR); in booke_enable_bpred()
121 if ((boothowto & RB_VERBOSE) != 0 || (csr & BUCSR_BPEN) == 0) in booke_enable_bpred()
123 (csr & BUCSR_BPEN) ? "en" : "dis"); in booke_enable_bpred()