Lines Matching +full:disable +full:- +full:mmu +full:- +full:reset
3 /*-
41 /* Locate the per-CPU data structure */
45 lis r,DMAP_BASE_ADDRESS@highesta; /* To real-mode alias/dmap */ \
53 * Requires that r28-r31 be scratch, with r28 initialized to the SLB cache
106 beq- 2f
124 * savearea r27-r31,DAR,DSISR (DAR & DSISR only for DSI traps)
132 * NOTE: SPRG1 is never used while the MMU is on, making it safe to reuse
133 * in any real-mode fault handler, including those handling double faults.
147 stdu %r31,-(FRAMELEN+288)(%r1); /* save it in the callframe */ \
159 std %r3, FRAME_3+48(%r1); /* save r3-r31 */ \
205 /* Disable exceptions: */ \
224 ld %r31,FRAME_31+48(%r1); /* restore r0-31 */ \
258 /* Disable translation, machine check and recoverability: */ \
279 bl restore_usersrs; /* uses r28-r31 */ \
311 * Processor reset exception handler. These are typically
313 * software reset. We do this in two bits so that we are
315 * once the MMU is turned on.
335 * Check if this is software reset or
337 * It is software reset when 46:47 = 0b00
340 ld %r2,TRAP_GENTRAP(0) /* Real-mode &generictrap */
344 beq 2f /* Branch if software reset */
346 /* Reset was wakeup */
347 addi %r9,%r2,(cpu_wakeup_handler-generictrap)
350 /* Reset was software reset */
359 addi %r9,%r2,(cpu_reset_handler-generictrap)
373 addi %r1,%r1,(TMPSTKSZ-48)
413 /* Turn on MMU after return from interrupt */
418 /* Turn on MMU (needed to access PCB) */
428 ld %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs. */
482 addi %r1,%r1,(generichypertrap-generictrap)
491 * Note: SPRG1 is always safe to overwrite any time the MMU was on, which is
515 ld %r1,TRAP_ENTRY(0) /* real-mode &generictrap */
522 ld %r1,TRAP_GENTRAP(0) /* Real-mode &generictrap */
523 addi %r1,%r1,(kern_slbtrap-generictrap)
598 addi %r1,%r1,PC_SLBSTACK-48+1024
609 /* Save r28-31, restore r4-r12 */
645 /* Restore r0-r3 */
661 std %r27,(PC_TEMPSAVE+CPUSAVE_R27)(%r1) /* free r27-r31 */
675 addi %r31,%r31,(s_trap - generictrap)
697 std %r27,(PC_DISISAVE+CPUSAVE_R27)(%r1) /* free r27-r31 */
709 addi %r1,%r1,(disitrap-generictrap)
746 sub. %r30,%r31,%r30 /* SP - DAR */
793 * R1 - Trap vector = LR & (0xff00 | R1)
794 * SPRG1 - Original R1 contents
795 * SPRG2 - Original LR
812 std %r27,(PC_TEMPSAVE+CPUSAVE_R27)(%r1) /* free r27-r31 */
829 addi %r30,%r30,-4 /* The branch instruction, not the next */
862 /* Disable interrupts: */
872 GET_CPUINFO(%r3) /* get per-CPU pointer */
876 mfmsr %r3 /* re-enable interrupts */
900 mtmsr %r3 /* disable interrupts */
926 addi %r1,%r1,(TRAPSTKSZ-48)
993 addi %r1,%r1,(dbtrap-generictrap)