86 static uint32_t	pci_docfgregread(int domain, int bus, int slot, int func,
88 static struct pcie_mcfg_region *pcie_lookup_region(int domain, int bus);
89 static int	pcireg_cfgread(int bus, int slot, int func, int reg, int bytes);
90 static void	pcireg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes);
92 static int	pciereg_cfgread(struct pcie_mcfg_region *region, int bus,
94 static void	pciereg_cfgwrite(struct pcie_mcfg_region *region, int bus,
164 pcie_lookup_region(int domain, int bus)  in pcie_lookup_region()  argument
168 		    bus >= mcfg_regions[i].minbus &&  in pcie_lookup_region()
169 		    bus <= mcfg_regions[i].maxbus)  in pcie_lookup_region()
175 pci_docfgregread(int domain, int bus, int slot, int func, int reg, int bytes)  in pci_docfgregread()  argument
177 	if (domain == 0 && bus == 0 && (1 << slot & pcie_badslots) != 0)  in pci_docfgregread()
178 		return (pcireg_cfgread(bus, slot, func, reg, bytes));  in pci_docfgregread()
183 		region = pcie_lookup_region(domain, bus);  in pci_docfgregread()
185 			return (pciereg_cfgread(region, bus, slot, func, reg,  in pci_docfgregread()
190 		return (pcireg_cfgread(bus, slot, func, reg, bytes));  in pci_docfgregread()
199 pci_cfgregread(int domain, int bus, int slot, int func, int reg, int bytes)  in pci_cfgregread()  argument
209 		line = pci_docfgregread(domain, bus, slot, func, PCIR_INTLINE,  in pci_cfgregread()
213 	return (pci_docfgregread(domain, bus, slot, func, reg, bytes));  in pci_cfgregread()
220 pci_cfgregwrite(int domain, int bus, int slot, int func, int reg, uint32_t data,  in pci_cfgregwrite()  argument
223 	if (domain == 0 && bus == 0 && (1 << slot & pcie_badslots) != 0) {  in pci_cfgregwrite()
224 		pcireg_cfgwrite(bus, slot, func, reg, data, bytes);  in pci_cfgregwrite()
231 		region = pcie_lookup_region(domain, bus);  in pci_cfgregwrite()
233 			pciereg_cfgwrite(region, bus, slot, func, reg, data,  in pci_cfgregwrite()
240 		pcireg_cfgwrite(bus, slot, func, reg, data, bytes);  in pci_cfgregwrite()
249 pci_cfgenable(unsigned bus, unsigned slot, unsigned func, int reg, int bytes)  in pci_cfgenable()  argument
253 	if (bus <= PCI_BUSMAX  in pci_cfgenable()
264 			    | (bus << 16) | (slot << 11)   in pci_cfgenable()
270 			outb(CONF2_FORWARD_PORT, bus);  in pci_cfgenable()
299 pcireg_cfgread(int bus, int slot, int func, int reg, int bytes)  in pcireg_cfgread()  argument
305 	port = pci_cfgenable(bus, slot, func, reg, bytes);  in pcireg_cfgread()
325 pcireg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes)  in pcireg_cfgwrite()  argument
330 	port = pci_cfgenable(bus, slot, func, reg, bytes);  in pcireg_cfgwrite()
592 #define PCIE_PADDR(base, reg, bus, slot, func)	\  argument
594 	((((bus) & 0xff) << 20)		|	\
600 pciereg_findaddr(struct pcie_mcfg_region *region, int bus, unsigned slot,  in pciereg_findaddr()  argument
607 	MPASS(bus >= region->minbus && bus <= region->maxbus);  in pciereg_findaddr()
609 	pa = PCIE_PADDR(region->base, reg, bus - region->minbus, slot, func);  in pciereg_findaddr()
650 pciereg_cfgread(struct pcie_mcfg_region *region, int bus, unsigned slot,  in pciereg_cfgread()  argument
660 	va = pciereg_findaddr(region, bus, slot, func, reg);  in pciereg_cfgread()
682 pciereg_cfgwrite(struct pcie_mcfg_region *region, int bus, unsigned slot,  in pciereg_cfgwrite()  argument
691 	va = pciereg_findaddr(region, bus, slot, func, reg);  in pciereg_cfgwrite()