1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
84     "Enable support for PCI-e memory mapped config access");
87 		    int reg, int bytes);
89 static int	pcireg_cfgread(int bus, int slot, int func, int reg, int bytes);
90 static void	pcireg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes);
93 		    unsigned slot, unsigned func, unsigned reg, unsigned bytes);
95 		    unsigned slot, unsigned func, unsigned reg, int data,
101  * numbers in the range 128-254 to indicate something strange and
175 pci_docfgregread(int domain, int bus, int slot, int func, int reg, int bytes)  in pci_docfgregread()  argument
178 		return (pcireg_cfgread(bus, slot, func, reg, bytes));  in pci_docfgregread()
185 			return (pciereg_cfgread(region, bus, slot, func, reg,  in pci_docfgregread()
190 		return (pcireg_cfgread(bus, slot, func, reg, bytes));  in pci_docfgregread()
192 		return (-1);  in pci_docfgregread()
199 pci_cfgregread(int domain, int bus, int slot, int func, int reg, int bytes)  in pci_cfgregread()  argument
208 	if (reg == PCIR_INTLINE && bytes == 1) {  in pci_cfgregread()
213 	return (pci_docfgregread(domain, bus, slot, func, reg, bytes));  in pci_cfgregread()
220 pci_cfgregwrite(int domain, int bus, int slot, int func, int reg, uint32_t data,  in pci_cfgregwrite()  argument
224 		pcireg_cfgwrite(bus, slot, func, reg, data, bytes);  in pci_cfgregwrite()
233 			pciereg_cfgwrite(region, bus, slot, func, reg, data,  in pci_cfgregwrite()
240 		pcireg_cfgwrite(bus, slot, func, reg, data, bytes);  in pci_cfgregwrite()
247 /* enable configuration space accesses and return data port address */
249 pci_cfgenable(unsigned bus, unsigned slot, unsigned func, int reg, int bytes)  in pci_cfgenable()  argument
256 	    && (unsigned)reg <= PCI_REGMAX  in pci_cfgenable()
259 	    && (reg & (bytes - 1)) == 0) {  in pci_cfgenable()
265 			    | (func << 8) | (reg & ~0x03));  in pci_cfgenable()
266 			dataport = CONF1_DATA_PORT + (reg & 0x03);  in pci_cfgenable()
271 			dataport = 0xc000 | (slot << 8) | reg;  in pci_cfgenable()
299 pcireg_cfgread(int bus, int slot, int func, int reg, int bytes)  in pcireg_cfgread()  argument
301 	int data = -1;  in pcireg_cfgread()  local
305 	port = pci_cfgenable(bus, slot, func, reg, bytes);  in pcireg_cfgread()
309 			data = inb(port);  in pcireg_cfgread()
312 			data = inw(port);  in pcireg_cfgread()
315 			data = inl(port);  in pcireg_cfgread()
321 	return (data);  in pcireg_cfgread()
325 pcireg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes)  in pcireg_cfgwrite()  argument
330 	port = pci_cfgenable(bus, slot, func, reg, bytes);  in pcireg_cfgwrite()
334 			outb(port, data);  in pcireg_cfgwrite()
337 			outw(port, data);  in pcireg_cfgwrite()
340 			outl(port, data);  in pcireg_cfgwrite()
390 		printf("-- nothing found\n");  in pci_cfgcheck()
502 		pcielist = &pcie_list[pc->pc_cpuid];  in pcie_init_cache()
509 			elem->vapage = va + (i * PAGE_SIZE);  in pcie_init_cache()
510 			elem->papage = 0;  in pcie_init_cache()
525 	 * inaccessible using memory-mapped PCI config access.  Walk  in pcie_init_badslots()
553 	    "PCI: MCFG domain %u bus %u-%u base 0x%jx too high\n",  in pcie_cfgregopen()
559 		printf("PCI: MCFG domain %u bus %u-%u base @ 0x%jx\n",  in pcie_cfgregopen()
564 			pcie_cache_initted = -1;  in pcie_cfgregopen()
569 	if (pcie_cache_initted == -1)  in pcie_cfgregopen()
577 	region->base = base + (minbus << 20);  in pcie_cfgregopen()
578 	region->domain = domain;  in pcie_cfgregopen()
579 	region->minbus = minbus;  in pcie_cfgregopen()
580 	region->maxbus = maxbus;  in pcie_cfgregopen()
592 #define PCIE_PADDR(base, reg, bus, slot, func)	\  argument
597 	((reg) & 0xfff)))
601     unsigned func, unsigned reg)  in pciereg_findaddr()  argument
607 	MPASS(bus >= region->minbus && bus <= region->maxbus);  in pciereg_findaddr()
609 	pa = PCIE_PADDR(region->base, reg, bus - region->minbus, slot, func);  in pciereg_findaddr()
620 		if (elem->papage == papage)  in pciereg_findaddr()
626 		if (elem->papage != 0) {  in pciereg_findaddr()
627 			pmap_kremove(elem->vapage);  in pciereg_findaddr()
628 			invlpg(elem->vapage);  in pciereg_findaddr()
630 		pmap_kenter(elem->vapage, papage);  in pciereg_findaddr()
631 		elem->papage = papage;  in pciereg_findaddr()
638 	return (elem->vapage | (pa & PAGE_MASK));  in pciereg_findaddr()
651     unsigned func, unsigned reg, unsigned bytes)  in pciereg_cfgread()  argument
654 	int data = -1;  in pciereg_cfgread()  local
656 	if (slot > PCI_SLOTMAX || func > PCI_FUNCMAX || reg > PCIE_REGMAX)  in pciereg_cfgread()
657 		return (-1);  in pciereg_cfgread()
660 	va = pciereg_findaddr(region, bus, slot, func, reg);  in pciereg_cfgread()
664 		__asm("movl %1, %0" : "=a" (data)  in pciereg_cfgread()
668 		__asm("movzwl %1, %0" : "=a" (data)  in pciereg_cfgread()
672 		__asm("movzbl %1, %0" : "=a" (data)  in pciereg_cfgread()
678 	return (data);  in pciereg_cfgread()
683     unsigned func, unsigned reg, int data, unsigned bytes)  in pciereg_cfgwrite()  argument
687 	if (slot > PCI_SLOTMAX || func > PCI_FUNCMAX || reg > PCIE_REGMAX)  in pciereg_cfgwrite()
691 	va = pciereg_findaddr(region, bus, slot, func, reg);  in pciereg_cfgwrite()
696 		    : "a" (data));  in pciereg_cfgwrite()
700 		    : "a" ((uint16_t)data));  in pciereg_cfgwrite()
704 		    : "a" ((uint8_t)data));  in pciereg_cfgwrite()