Lines Matching +full:0 +full:xc300
82 #size-cells = <0>;
84 PowerPC,8572@0 {
86 reg = <0x0>;
89 d-cache-size = <0x8000>; // L1, 32K
90 i-cache-size = <0x8000>; // L1, 32K
91 timebase-frequency = <0>;
92 bus-frequency = <0>;
93 clock-frequency = <0>;
99 reg = <0x1>;
102 d-cache-size = <0x8000>; // L1, 32K
103 i-cache-size = <0x8000>; // L1, 32K
104 timebase-frequency = <0>;
105 bus-frequency = <0>;
106 clock-frequency = <0>;
119 reg = <0 0xffe05000 0 0x1000>;
123 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000>;
125 nor@0,0 {
129 reg = <0x0 0x0 0x8000000>;
133 partition@0 {
134 reg = <0x0 0x03000000>;
140 reg = <0x03000000 0x00e00000>;
146 reg = <0x03e00000 0x00200000>;
152 reg = <0x04000000 0x00400000>;
158 reg = <0x04400000 0x03b00000>;
163 reg = <0x07f00000 0x00080000>;
169 reg = <0x07f80000 0x00080000>;
175 nand@2,0 {
180 reg = <0x2 0x0 0x40000>;
182 partition@0 {
183 reg = <0x0 0x02000000>;
189 reg = <0x02000000 0x10000000>;
194 reg = <0x12000000 0x08000000>;
200 reg = <0x1a000000 0x04000000>;
205 reg = <0x1e000000 0x01000000>;
211 reg = <0x1f000000 0x21000000>;
216 nand@4,0 {
219 reg = <0x4 0x0 0x40000>;
222 nand@5,0 {
225 reg = <0x5 0x0 0x40000>;
228 nand@6,0 {
231 reg = <0x6 0x0 0x40000>;
240 ranges = <0x0 0 0xffe00000 0x100000>;
241 bus-frequency = <0>; // Filled out by uboot.
243 ecm-law@0 {
245 reg = <0x0 0x1000>;
251 reg = <0x1000 0x1000>;
258 reg = <0x2000 0x1000>;
265 reg = <0x6000 0x1000>;
272 reg = <0x20000 0x1000>;
274 cache-size = <0x100000>; // L2, 1M
281 #size-cells = <0>;
282 cell-index = <0>;
284 reg = <0x3000 0x100>;
292 #size-cells = <0>;
295 reg = <0x3100 0x100>;
305 reg = <0xc300 0x4>;
306 ranges = <0x0 0xc100 0x200>;
308 dma-channel@0 {
311 reg = <0x0 0x80>;
312 cell-index = <0>;
319 reg = <0x80 0x80>;
327 reg = <0x100 0x80>;
335 reg = <0x180 0x80>;
346 reg = <0x21300 0x4>;
347 ranges = <0x0 0x21100 0x200>;
348 cell-index = <0>;
349 dma-channel@0 {
352 reg = <0x0 0x80>;
353 cell-index = <0>;
360 reg = <0x80 0x80>;
368 reg = <0x100 0x80>;
376 reg = <0x180 0x80>;
385 reg = <0x24e00 0xb0>;
391 cell-index = <0>;
395 reg = <0x24000 0x1000>;
396 ranges = <0x0 0x24000 0x1000>;
407 #size-cells = <0>;
409 reg = <0x520 0x20>;
411 phy0: ethernet-phy@0 {
414 reg = <0x0>;
419 reg = <0x1>;
424 reg = <0x2>;
429 reg = <0x3>;
433 reg = <0x11>;
446 reg = <0x25000 0x1000>;
447 ranges = <0x0 0x25000 0x1000>;
458 #size-cells = <0>;
460 reg = <0x520 0x20>;
463 reg = <0x11>;
476 reg = <0x26000 0x1000>;
477 ranges = <0x0 0x26000 0x1000>;
488 #size-cells = <0>;
490 reg = <0x520 0x20>;
493 reg = <0x11>;
506 reg = <0x27000 0x1000>;
507 ranges = <0x0 0x27000 0x1000>;
517 #size-cells = <0>;
519 reg = <0x520 0x20>;
522 reg = <0x11>;
529 cell-index = <0>;
532 reg = <0x4500 0x100>;
533 clock-frequency = <0>;
542 reg = <0x4600 0x100>;
543 clock-frequency = <0>;
550 reg = <0xe0000 0x1000>;
556 reg = <0xe0070 0x14>;
561 reg = <0x41100 0x204>;
562 interrupts = <0xf7 0x2>;
568 reg = <0x41600 0x80>;
569 msi-available-ranges = <0 0x100>;
571 0xe0 0
572 0xe1 0
573 0xe2 0
574 0xe3 0
575 0xe4 0
576 0xe5 0
577 0xe6 0
578 0xe7 0>;
583 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
584 "fsl,sec2.1", "fsl,sec2.0";
585 reg = <0x30000 0x10000>;
590 fsl,exec-units-mask = <0x9fe>;
591 fsl,descriptor-types-mask = <0x3ab0ebf>;
598 reg = <0x10000 0x5000>;
599 interrupts = <0x39 0x2 0x40 0x2 0x41 0x2 0x42 0x2 0x43 0x2>;
605 #address-cells = <0>;
607 reg = <0x40000 0x40000>;
619 reg = <0 0xffe08000 0 0x1000>;
620 bus-range = <0 255>;
621 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
622 0x1000000 0x0 0x00000000 0 0xfee20000 0x0 0x00010000>;
626 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
628 /* IDSEL 0x11 func 0 - PCI slot 1 */
629 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
630 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
631 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
632 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
634 /* IDSEL 0x11 func 1 - PCI slot 1 */
635 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
636 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
637 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
638 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
640 /* IDSEL 0x11 func 2 - PCI slot 1 */
641 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
642 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
643 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
644 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
646 /* IDSEL 0x11 func 3 - PCI slot 1 */
647 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
648 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
649 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
650 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
652 /* IDSEL 0x11 func 4 - PCI slot 1 */
653 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
654 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
655 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
656 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
658 /* IDSEL 0x11 func 5 - PCI slot 1 */
659 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
660 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
661 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
662 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
664 /* IDSEL 0x11 func 6 - PCI slot 1 */
665 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
666 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
667 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
668 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
670 /* IDSEL 0x11 func 7 - PCI slot 1 */
671 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
672 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
673 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
674 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
676 /* IDSEL 0x12 func 0 - PCI slot 2 */
677 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
678 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
679 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
680 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
682 /* IDSEL 0x12 func 1 - PCI slot 2 */
683 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
684 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
685 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
686 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
688 /* IDSEL 0x12 func 2 - PCI slot 2 */
689 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
690 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
691 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
692 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
694 /* IDSEL 0x12 func 3 - PCI slot 2 */
695 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
696 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
697 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
698 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
700 /* IDSEL 0x12 func 4 - PCI slot 2 */
701 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
702 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
703 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
704 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
706 /* IDSEL 0x12 func 5 - PCI slot 2 */
707 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
708 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
709 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
710 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
712 /* IDSEL 0x12 func 6 - PCI slot 2 */
713 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
714 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
715 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
716 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
718 /* IDSEL 0x12 func 7 - PCI slot 2 */
719 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
720 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
721 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
722 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
724 // IDSEL 0x1c USB
725 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
726 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
727 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
728 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
730 // IDSEL 0x1d Audio
731 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
733 // IDSEL 0x1e Legacy
734 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
735 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
737 // IDSEL 0x1f IDE/SATA
738 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
739 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
743 pcie@0 {
744 reg = <0x0 0x0 0x0 0x0 0x0>;
748 ranges = <0x2000000 0x0 0xa0000000
749 0x2000000 0x0 0xa0000000
750 0x0 0x10000000
752 0x1000000 0x0 0x0
753 0x1000000 0x0 0x0
754 0x0 0x10000>;
755 uli1575@0 {
756 reg = <0x0 0x0 0x0 0x0 0x0>;
759 ranges = <0x2000000 0x0 0xa0000000
760 0x2000000 0x0 0xa0000000
761 0x0 0x10000000
763 0x1000000 0x0 0x0
764 0x1000000 0x0 0x0
765 0x0 0x10000>;
771 reg = <0xf000 0x0 0x0 0x0 0x0>;
772 ranges = <0x1 0x0 0x1000000 0x0 0x0
773 0x1000>;
777 reg = <0x1 0x20 0x2
778 0x1 0xa0 0x2
779 0x1 0x4d0 0x2>;
782 #address-cells = <0>;
790 #size-cells = <0>;
792 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
797 keyboard@0 {
798 reg = <0x0>;
803 reg = <0x1>;
810 reg = <0x1 0x70 0x2>;
814 reg = <0x1 0x400 0x80>;
828 reg = <0 0xffe09000 0 0x1000>;
829 bus-range = <0 255>;
830 ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000
831 0x1000000 0x0 0x00000000 0 0xfee10000 0x0 0x00010000>;
835 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
837 /* IDSEL 0x0 */
838 0000 0x0 0x0 0x1 &mpic 0x4 0x1
839 0000 0x0 0x0 0x2 &mpic 0x5 0x1
840 0000 0x0 0x0 0x3 &mpic 0x6 0x1
841 0000 0x0 0x0 0x4 &mpic 0x7 0x1
843 pcie@0 {
844 reg = <0x0 0x0 0x0 0x0 0x0>;
848 ranges = <0x2000000 0x0 0x90000000
849 0x2000000 0x0 0x90000000
850 0x0 0x10000000
852 0x1000000 0x0 0x0
853 0x1000000 0x0 0x0
854 0x0 0x10000>;
864 reg = <0 0xffe0a000 0 0x1000>;
865 bus-range = <0 255>;
866 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000
867 0x1000000 0x0 0x00000000 0 0xfee00000 0x0 0x00010000>;
871 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
873 /* IDSEL 0x0 */
874 0000 0x0 0x0 0x1 &mpic 0x0 0x1
875 0000 0x0 0x0 0x2 &mpic 0x1 0x1
876 0000 0x0 0x0 0x3 &mpic 0x2 0x1
877 0000 0x0 0x0 0x4 &mpic 0x3 0x1
879 pcie@0 {
880 reg = <0x0 0x0 0x0 0x0 0x0>;
884 ranges = <0x2000000 0x0 0x80000000
885 0x2000000 0x0 0x80000000
886 0x0 0x10000000
888 0x1000000 0x0 0x0
889 0x1000000 0x0 0x0
890 0x0 0x10000>;