Lines Matching +full:0 +full:xd000
36 memreserve = <0x00000000 0x00080000>;
45 ranges = <0x0 0xf8000000 0xf10000>;
50 reg = <0x0 0x1000>;
57 #address-cells = <0>;
59 reg = <0xf01000 0x1000>, // distributer registers
60 <0xf00100 0x0100>; // CPU if registers
66 reg = <0xf02000 0x1000>;
67 interrupts = <0 2 4>;
74 reg = <0x7000 0x1000>;
75 interrupts = <0 8 4>;
82 reg = <0x1000 0x1000>;
87 reg = <0x2000 0x1000>;
94 #size-cells = <0>;
95 reg = <0xf00200 0x100>, // Global Timer Regs
96 <0xf00600 0x20>; // Private Timer Regs
105 reg = <0x5000 0x1000>;
106 interrupts = <0 9 1>;
113 reg = <0xf00620 0x20>;
128 ranges = <0x0 0xe0000000 0x300000>;
135 reg = <0x0000 0x1000>;
136 interrupts = <0 27 4>;
145 reg = <0x1000 0x1000>;
146 interrupts = <0 50 4>;
155 reg = <0x2000 0x1000>;
156 interrupts = <0 21 4>;
163 reg = <0x3000 0x1000>;
164 interrupts = <0 44 4>;
171 reg = <0xa000 0x1000>;
172 interrupts = <0 20 4>;
181 reg = <0xb000 0x1000>;
182 interrupts = <0 22 4>;
184 ref-clock-num = <0>;
191 reg = <0xc000 0x1000>;
192 interrupts = <0 45 4>;
201 reg = <0xd000 0x1000>;
202 interrupts = <0 19 4>;
212 reg = <0x6000 0x100>;
213 interrupts = <0 26 4>;
220 reg = <0x7000 0x100>;
221 interrupts = <0 49 4>;
229 reg = <0x100000 0x1000>;
230 interrupts = <0 24 4>;
238 reg = <0x101000 0x1000>;
239 interrupts = <0 47 4>;