Lines Matching +full:tx +full:- +full:rx
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2010-2011 Monthadar Al Jaberi, TerraNet AB
7 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
36 * Ioctl-related defintions for the Wireless TAP
58 u_int32_t ast_rxorn; /* rx overrun interrupts */
59 u_int32_t ast_rxeol; /* rx eol interrupts */
60 u_int32_t ast_txurn; /* tx underrun interrupts */
67 u_int32_t ast_tx_encap; /* tx encapsulation failed */
68 u_int32_t ast_tx_nonode; /* tx failed 'cuz no node */
69 u_int32_t ast_tx_nombuf; /* tx failed 'cuz no mbuf */
70 u_int32_t ast_tx_nomcl; /* tx failed 'cuz no cluster */
71 u_int32_t ast_tx_linear; /* tx linearized to cluster */
72 u_int32_t ast_tx_nodata; /* tx discarded empty frame */
73 u_int32_t ast_tx_busdma; /* tx failed for dma resrcs */
74 u_int32_t ast_tx_xretries;/* tx failed 'cuz too many retries */
75 u_int32_t ast_tx_fifoerr; /* tx failed 'cuz FIFO underrun */
76 u_int32_t ast_tx_filtered;/* tx failed 'cuz xmit filtered */
77 u_int32_t ast_tx_shortretry;/* tx on-chip retries (short) */
78 u_int32_t ast_tx_longretry;/* tx on-chip retries (long) */
79 u_int32_t ast_tx_badrate; /* tx failed 'cuz bogus xmit rate */
80 u_int32_t ast_tx_noack; /* tx frames with no ack marked */
81 u_int32_t ast_tx_rts; /* tx frames with rts enabled */
82 u_int32_t ast_tx_cts; /* tx frames with cts enabled */
83 u_int32_t ast_tx_shortpre;/* tx frames with short preamble */
84 u_int32_t ast_tx_altrate; /* tx frames with alternate rate */
85 u_int32_t ast_tx_protect; /* tx frames with protection */
86 u_int32_t ast_tx_ctsburst;/* tx frames with cts and bursting */
87 u_int32_t ast_tx_ctsext; /* tx frames with cts extension */
88 u_int32_t ast_rx_nombuf; /* rx setup failed 'cuz no mbuf */
89 u_int32_t ast_rx_busdma; /* rx setup failed for dma resrcs */
90 u_int32_t ast_rx_orn; /* rx failed 'cuz of desc overrun */
91 u_int32_t ast_rx_crcerr; /* rx failed 'cuz of bad CRC */
92 u_int32_t ast_rx_fifoerr; /* rx failed 'cuz of FIFO overrun */
93 u_int32_t ast_rx_badcrypt;/* rx failed 'cuz decryption */
94 u_int32_t ast_rx_badmic; /* rx failed 'cuz MIC failure */
95 u_int32_t ast_rx_phyerr; /* rx failed 'cuz of PHY err */
96 u_int32_t ast_rx_phy[32]; /* rx PHY error per-code counts */
97 u_int32_t ast_rx_tooshort;/* rx discarded 'cuz frame too short */
98 u_int32_t ast_rx_toobig; /* rx discarded 'cuz frame too large */
101 u_int32_t ast_rx_ctl; /* rx discarded 'cuz ctl frame */
102 int8_t ast_tx_rssi; /* tx rssi of last ack */
103 int8_t ast_rx_rssi; /* rx rssi from histogram */
104 u_int8_t ast_tx_rate; /* IEEE rate of last unicast tx */
113 u_int32_t ast_ant_defswitch;/* rx/default antenna switches */
114 u_int32_t ast_ant_txswitch;/* tx antenna switches */
115 u_int32_t ast_ant_rx[8]; /* rx frames with antenna */
116 u_int32_t ast_ant_tx[8]; /* tx frames with antenna */
119 u_int32_t ast_tx_raw; /* tx frames through raw api */
120 u_int32_t ast_ff_txok; /* fast frames tx'd successfully */
121 u_int32_t ast_ff_txerr; /* fast frames tx'd w/ error */
122 u_int32_t ast_ff_rx; /* fast frames rx'd */
124 u_int32_t ast_tx_qfull; /* tx dropped 'cuz of queue limit */
125 int8_t ast_rx_noise; /* rx noise floor */
126 u_int32_t ast_tx_nobuf; /* tx dropped 'cuz no ath buffer */
131 u_int16_t ast_tdma_tsfadjm;/* TDMA slot adjust- (usec, smoothed)*/
132 u_int32_t ast_tdma_ack; /* TDMA tx failed 'cuz ACK required */
133 u_int32_t ast_tx_raw_fail;/* raw tx failed 'cuz h/w down */
134 u_int32_t ast_tx_nofrag; /* tx dropped 'cuz no ath frag buffer */