477 	while (bgx->lmac[lmac].dmac > 0) {  in bgx_flush_dmac_addrs()
478 		offset = ((bgx->lmac[lmac].dmac - 1) * sizeof(uint64_t)) +  in bgx_flush_dmac_addrs()
481 		bgx->lmac[lmac].dmac--;  in bgx_flush_dmac_addrs()
486 bgx_add_dmac_addr(uint64_t dmac, int node, int bgx_idx, int lmac)  in bgx_add_dmac_addr()  argument
504 	dmac = dmac | (1UL << 48) | ((uint64_t)lmac << 49); /* Enable DMAC */  in bgx_add_dmac_addr()
505 	if (bgx->lmac[lmac].dmac == MAX_DMAC_PER_LMAC) {  in bgx_add_dmac_addr()
512 	if (bgx->lmac[lmac].dmac == MAX_DMAC_PER_LMAC_TNS_BYPASS_MODE)  in bgx_add_dmac_addr()
513 		bgx->lmac[lmac].dmac = 1;  in bgx_add_dmac_addr()
515 	offset = (bgx->lmac[lmac].dmac * sizeof(uint64_t)) +  in bgx_add_dmac_addr()
517 	bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + offset, dmac);  in bgx_add_dmac_addr()
518 	bgx->lmac[lmac].dmac++;  in bgx_add_dmac_addr()