126 	uint64_t reg_val;  in nicvf_poll_reg()  local
133 		reg_val = nicvf_queue_reg_read(nic, reg, qidx);  in nicvf_poll_reg()
134 		if (((reg_val & bit_mask) >> bit_pos) == val)  in nicvf_poll_reg()
2049 	uint64_t reg_val;  in nicvf_enable_intr()  local
2051 	reg_val = nicvf_reg_read(nic, NIC_VF_ENA_W1S);  in nicvf_enable_intr()
2055 		reg_val |= ((1UL << q_idx) << NICVF_INTR_CQ_SHIFT);  in nicvf_enable_intr()
2058 		reg_val |= ((1UL << q_idx) << NICVF_INTR_SQ_SHIFT);  in nicvf_enable_intr()
2061 		reg_val |= ((1UL << q_idx) << NICVF_INTR_RBDR_SHIFT);  in nicvf_enable_intr()
2064 		reg_val |= (1UL << NICVF_INTR_PKT_DROP_SHIFT);  in nicvf_enable_intr()
2067 		reg_val |= (1UL << NICVF_INTR_TCP_TIMER_SHIFT);  in nicvf_enable_intr()
2070 		reg_val |= (1UL << NICVF_INTR_MBOX_SHIFT);  in nicvf_enable_intr()
2073 		reg_val |= (1UL << NICVF_INTR_QS_ERR_SHIFT);  in nicvf_enable_intr()
2081 	nicvf_reg_write(nic, NIC_VF_ENA_W1S, reg_val);  in nicvf_enable_intr()
2088 	uint64_t reg_val = 0;  in nicvf_disable_intr()  local
2092 		reg_val |= ((1UL << q_idx) << NICVF_INTR_CQ_SHIFT);  in nicvf_disable_intr()
2095 		reg_val |= ((1UL << q_idx) << NICVF_INTR_SQ_SHIFT);  in nicvf_disable_intr()
2098 		reg_val |= ((1UL << q_idx) << NICVF_INTR_RBDR_SHIFT);  in nicvf_disable_intr()
2101 		reg_val |= (1UL << NICVF_INTR_PKT_DROP_SHIFT);  in nicvf_disable_intr()
2104 		reg_val |= (1UL << NICVF_INTR_TCP_TIMER_SHIFT);  in nicvf_disable_intr()
2107 		reg_val |= (1UL << NICVF_INTR_MBOX_SHIFT);  in nicvf_disable_intr()
2110 		reg_val |= (1UL << NICVF_INTR_QS_ERR_SHIFT);  in nicvf_disable_intr()
2118 	nicvf_reg_write(nic, NIC_VF_ENA_W1C, reg_val);  in nicvf_disable_intr()
2125 	uint64_t reg_val = 0;  in nicvf_clear_intr()  local
2129 		reg_val = ((1UL << q_idx) << NICVF_INTR_CQ_SHIFT);  in nicvf_clear_intr()
2132 		reg_val = ((1UL << q_idx) << NICVF_INTR_SQ_SHIFT);  in nicvf_clear_intr()
2135 		reg_val = ((1UL << q_idx) << NICVF_INTR_RBDR_SHIFT);  in nicvf_clear_intr()
2138 		reg_val = (1UL << NICVF_INTR_PKT_DROP_SHIFT);  in nicvf_clear_intr()
2141 		reg_val = (1UL << NICVF_INTR_TCP_TIMER_SHIFT);  in nicvf_clear_intr()
2144 		reg_val = (1UL << NICVF_INTR_MBOX_SHIFT);  in nicvf_clear_intr()
2147 		reg_val |= (1UL << NICVF_INTR_QS_ERR_SHIFT);  in nicvf_clear_intr()
2155 	nicvf_reg_write(nic, NIC_VF_INT, reg_val);  in nicvf_clear_intr()
2162 	uint64_t reg_val;  in nicvf_is_intr_enabled()  local
2165 	reg_val = nicvf_reg_read(nic, NIC_VF_ENA_W1S);  in nicvf_is_intr_enabled()
2195 	return (reg_val & mask);  in nicvf_is_intr_enabled()