Lines Matching +full:single +full:- +full:shot

1 /*-
2  * SPDX-License-Identifier: BSD-4-Clause
18  * 4. Neither the name of the author nor the names of any co-contributors
37  * Definitions for the built-in copper PHY can be found in vgphy.h.
41  * using 32-bit I/O cycles, but some of them are less than 32 bits
119 #define VGE_SSTIMER		0x74	/* single-shot timer */
218 #define VGE_CR1_TIMER0_ENABLE		0x20 /* enable single shot timer */
233 #define VGE_CR3_INT_SWPEND		0x01 /* disable multi-level int bits */
285 #define VGE_ISR_TIMER0		0x00010000 /* one shot timer expired */
323 #define VGE_IMR_TIMER0		0x00010000 /* one shot timer expired */
386  * - The behavior of the MAR0/MAR1 registers at offset 0x10 (the
389  * - The behavior of the interrupt holdoff timer register at offset
393  * - The behavior the WOL pattern programming registers at offset
456 #define VGE_CHIPCFG0_PACPI	0x01	/* pre-ACPI wakeup function */
537 #define VGE_TXCFG_NONBLK	0x02	/* priority TX/non-blocking mode */
538 #define VGE_TXCFG_NONBLK_THR	0x0C	/* non-blocking threshold */
590 #define	VGE_MIB_CNT		(VGE_MIB_TX_LATECOLLS - VGE_MIB_RX_FRAMES + 1)
728 /* Receive DMA descriptors have a single fragment pointer. */