258 		if (CSR_READ_1(sc, VGE_EECMD) & VGE_EECMD_EDONE)  in vge_eeprom_getword()
299 		dest[i] = CSR_READ_1(sc, VGE_PAR0 + i);  in vge_read_eeprom()
312 		if (CSR_READ_1(sc, VGE_MIISTS) & VGE_MIISTS_IIDL)  in vge_miipoll_stop()
332 		if (CSR_READ_1(sc, VGE_MIISTS) & VGE_MIISTS_IIDL)  in vge_miipoll_start()
349 		if ((CSR_READ_1(sc, VGE_MIISTS) & VGE_MIISTS_IIDL) == 0)  in vge_miipoll_start()
377 		if ((CSR_READ_1(sc, VGE_MIICMD) & VGE_MIICMD_RCMD) == 0)  in vge_miibus_readreg()
413 		if ((CSR_READ_1(sc, VGE_MIICMD) & VGE_MIICMD_WCMD) == 0)  in vge_miibus_writereg()
482 		if ((CSR_READ_1(sc, VGE_CAMCTL) & VGE_CAMCTL_WRITE) == 0)  in vge_cam_set()
520 	cfg = CSR_READ_1(sc, VGE_RXCFG);  in vge_setvlan()
573 	rxcfg = CSR_READ_1(sc, VGE_RXCTL);  in vge_rxfilter()
623 		if ((CSR_READ_1(sc, VGE_CRS1) & VGE_CR1_SOFTRESET) == 0)  in vge_reset()
1059 		if ((CSR_READ_1(sc, VGE_EECSR) & VGE_EECSR_RELOAD) == 0)  in vge_attach()
1084 		sc->vge_phyaddr = CSR_READ_1(sc, VGE_MIICFG) &  in vge_attach()
1659 	physts = CSR_READ_1(sc, VGE_PHYSTS0);  in vge_link_statchg()
2598 	    CSR_READ_1(sc, VGE_MIBCSR) | VGE_MIBCSR_FREEZE);  in vge_stats_clear()
2600 	    CSR_READ_1(sc, VGE_MIBCSR) | VGE_MIBCSR_CLR);  in vge_stats_clear()
2603 		if ((CSR_READ_1(sc, VGE_MIBCSR) & VGE_MIBCSR_CLR) == 0)  in vge_stats_clear()
2608 	CSR_WRITE_1(sc, VGE_MIBCSR, CSR_READ_1(sc, VGE_MIBCSR) &  in vge_stats_clear()
2626 	    CSR_READ_1(sc, VGE_MIBCSR) | VGE_MIBCSR_FLUSH);  in vge_stats_update()
2629 		if ((CSR_READ_1(sc, VGE_MIBCSR) & VGE_MIBCSR_FLUSH) == 0)  in vge_stats_update()
2642 	    CSR_READ_1(sc, VGE_MIBCSR) | VGE_MIBCSR_RINI);  in vge_stats_update()
2737 	intctl = CSR_READ_1(sc, VGE_INTCTL1);  in vge_intr_holdoff()
2869 	val = CSR_READ_1(sc, VGE_PWRSTAT);  in vge_setwol()
2873 	val = CSR_READ_1(sc, VGE_PWRSTAT);  in vge_setwol()
2886 	val = CSR_READ_1(sc, VGE_PWRSTAT);  in vge_clrwol()
2890 	val = CSR_READ_1(sc, VGE_PWRSTAT);  in vge_clrwol()