830 	/* retrieve RF rev. no and various other things from EEPROM */  in run_attach()
834 	    "MAC/BBP RT%04X (rev 0x%04X), RF %s (MIMO %dT%dR), address %s\n",  in run_attach()
1889 			/* read vendor RF settings */  in run_read_eeprom()
1893 				sc->rf[i].val = val & 0xff;  in run_read_eeprom()
1894 				sc->rf[i].reg = val >> 8;  in run_read_eeprom()
1895 				RUN_DPRINTF(sc, RUN_DEBUG_ROM, "RF%d=0x%02x\n",  in run_read_eeprom()
1896 				    sc->rf[i].reg, sc->rf[i].val);  in run_read_eeprom()
1901 	/* read RF frequency offset from EEPROM */  in run_read_eeprom()
1930 	/* read RF information */  in run_read_eeprom()
1964 	RUN_DPRINTF(sc, RUN_DEBUG_ROM, "EEPROM RF rev=0x%04x chains=%dT%dR\n",  in run_read_eeprom()
1967 	/* check if RF supports automatic Tx access gain control */  in run_read_eeprom()
1976 		/* check if RF supports automatic Tx access gain control */  in run_read_eeprom()
3980 	/* RF IQ compensation control. */  in run_iq_calib()
3986 	/* RF IQ imbalance compensation control. */  in run_iq_calib()
4176 	/* Initialize RF R3 and R4. */  in run_rt2870_set_chan()
4228 	uint8_t rf;  in run_rt3070_set_chan()  local
4240 	/* RT3370/RT3390: RF R3 [7:4] is not reserved bits. */  in run_rt3070_set_chan()
4241 	run_rt3070_rf_read(sc, 3, &rf);  in run_rt3070_set_chan()
4242 	rf = (rf & ~0x0f) | rt3070_freqs[i].k;  in run_rt3070_set_chan()
4243 	run_rt3070_rf_write(sc, 3, rf);  in run_rt3070_set_chan()
4245 	run_rt3070_rf_read(sc, 6, &rf);  in run_rt3070_set_chan()
4246 	rf = (rf & ~0x03) | rt3070_freqs[i].r;  in run_rt3070_set_chan()
4247 	run_rt3070_rf_write(sc, 6, rf);  in run_rt3070_set_chan()
4250 	run_rt3070_rf_read(sc, 12, &rf);  in run_rt3070_set_chan()
4251 	rf = (rf & ~0x1f) | txpow1;  in run_rt3070_set_chan()
4252 	run_rt3070_rf_write(sc, 12, rf);  in run_rt3070_set_chan()
4255 	run_rt3070_rf_read(sc, 13, &rf);  in run_rt3070_set_chan()
4256 	rf = (rf & ~0x1f) | txpow2;  in run_rt3070_set_chan()
4257 	run_rt3070_rf_write(sc, 13, rf);  in run_rt3070_set_chan()
4259 	run_rt3070_rf_read(sc, 1, &rf);  in run_rt3070_set_chan()
4260 	rf &= ~0xfc;  in run_rt3070_set_chan()
4262 		rf |= 1 << 7 | 1 << 5;	/* 1T: disable Tx chains 2 & 3 */  in run_rt3070_set_chan()
4264 		rf |= 1 << 7;		/* 2T: disable Tx chain 3 */  in run_rt3070_set_chan()
4266 		rf |= 1 << 6 | 1 << 4;	/* 1R: disable Rx chains 2 & 3 */  in run_rt3070_set_chan()
4268 		rf |= 1 << 6;		/* 2R: disable Rx chain 3 */  in run_rt3070_set_chan()
4269 	run_rt3070_rf_write(sc, 1, rf);  in run_rt3070_set_chan()
4271 	/* set RF offset */  in run_rt3070_set_chan()
4272 	run_rt3070_rf_read(sc, 23, &rf);  in run_rt3070_set_chan()
4273 	rf = (rf & ~0x7f) | sc->freq;  in run_rt3070_set_chan()
4274 	run_rt3070_rf_write(sc, 23, rf);  in run_rt3070_set_chan()
4276 	/* program RF filter */  in run_rt3070_set_chan()
4277 	run_rt3070_rf_read(sc, 24, &rf);	/* Tx */  in run_rt3070_set_chan()
4278 	rf = (rf & ~0x3f) | sc->rf24_20mhz;  in run_rt3070_set_chan()
4279 	run_rt3070_rf_write(sc, 24, rf);  in run_rt3070_set_chan()
4280 	run_rt3070_rf_read(sc, 31, &rf);	/* Rx */  in run_rt3070_set_chan()
4281 	rf = (rf & ~0x3f) | sc->rf24_20mhz;  in run_rt3070_set_chan()
4282 	run_rt3070_rf_write(sc, 31, rf);  in run_rt3070_set_chan()
4284 	/* enable RF tuning */  in run_rt3070_set_chan()
4285 	run_rt3070_rf_read(sc, 7, &rf);  in run_rt3070_set_chan()
4286 	run_rt3070_rf_write(sc, 7, rf | 0x01);  in run_rt3070_set_chan()
4294 	uint8_t rf;  in run_rt3572_set_chan()  local
4315 	run_rt3070_rf_read(sc, 6, &rf);  in run_rt3572_set_chan()
4316 	rf  = (rf & ~0x0f) | rt3070_freqs[i].r;  in run_rt3572_set_chan()
4317 	rf |= (chan <= 14) ? 0x08 : 0x04;  in run_rt3572_set_chan()
4318 	run_rt3070_rf_write(sc, 6, rf);  in run_rt3572_set_chan()
4321 	run_rt3070_rf_read(sc, 5, &rf);  in run_rt3572_set_chan()
4322 	rf &= ~(0x08 | 0x04);  in run_rt3572_set_chan()
4323 	rf |= (chan <= 14) ? 0x04 : 0x08;  in run_rt3572_set_chan()
4324 	run_rt3070_rf_write(sc, 5, rf);  in run_rt3572_set_chan()
4328 		rf = 0x60 | txpow1;  in run_rt3572_set_chan()
4330 		rf = 0xe0 | (txpow1 & 0xc) << 1 | (txpow1 & 0x3);  in run_rt3572_set_chan()
4331 	run_rt3070_rf_write(sc, 12, rf);  in run_rt3572_set_chan()
4335 		rf = 0x60 | txpow2;  in run_rt3572_set_chan()
4337 		rf = 0xe0 | (txpow2 & 0xc) << 1 | (txpow2 & 0x3);  in run_rt3572_set_chan()
4338 	run_rt3070_rf_write(sc, 13, rf);  in run_rt3572_set_chan()
4341 	run_rt3070_rf_read(sc, 1, &rf);  in run_rt3572_set_chan()
4342 	rf &= ~0xfc;  in run_rt3572_set_chan()
4344 		rf |= 1 << 7 | 1 << 5;  /* 1T: disable Tx chains 2 & 3 */  in run_rt3572_set_chan()
4346 		rf |= 1 << 7;           /* 2T: disable Tx chain 3 */  in run_rt3572_set_chan()
4348 		rf |= 1 << 6 | 1 << 4;  /* 1R: disable Rx chains 2 & 3 */  in run_rt3572_set_chan()
4350 		rf |= 1 << 6;           /* 2R: disable Rx chain 3 */  in run_rt3572_set_chan()
4351 	run_rt3070_rf_write(sc, 1, rf);  in run_rt3572_set_chan()
4353 	/* set RF offset */  in run_rt3572_set_chan()
4354 	run_rt3070_rf_read(sc, 23, &rf);  in run_rt3572_set_chan()
4355 	rf = (rf & ~0x7f) | sc->freq;  in run_rt3572_set_chan()
4356 	run_rt3070_rf_write(sc, 23, rf);  in run_rt3572_set_chan()
4358 	/* program RF filter */  in run_rt3572_set_chan()
4359 	rf = sc->rf24_20mhz;  in run_rt3572_set_chan()
4360 	run_rt3070_rf_write(sc, 24, rf);	/* Tx */  in run_rt3572_set_chan()
4361 	run_rt3070_rf_write(sc, 31, rf);	/* Rx */  in run_rt3572_set_chan()
4363 	/* enable RF tuning */  in run_rt3572_set_chan()
4364 	run_rt3070_rf_read(sc, 7, &rf);  in run_rt3572_set_chan()
4365 	rf = (chan <= 14) ? 0xd8 : ((rf & ~0xc8) | 0x14);  in run_rt3572_set_chan()
4366 	run_rt3070_rf_write(sc, 7, rf);  in run_rt3572_set_chan()
4369 	rf = (chan <= 14) ? 0xc3 : 0xc0;  in run_rt3572_set_chan()
4370 	run_rt3070_rf_write(sc, 9, rf);  in run_rt3572_set_chan()
4381 		rf = 0x48 | sc->txmixgain_2ghz;  in run_rt3572_set_chan()
4383 		rf = 0x78 | sc->txmixgain_5ghz;  in run_rt3572_set_chan()
4384 	run_rt3070_rf_write(sc, 16, rf);  in run_rt3572_set_chan()
4390 		rf = 0x93;  in run_rt3572_set_chan()
4392 		rf = 0xb7;  in run_rt3572_set_chan()
4394 		rf = 0x74;  in run_rt3572_set_chan()
4396 		rf = 0x72;  in run_rt3572_set_chan()
4397 	run_rt3070_rf_write(sc, 19, rf);  in run_rt3572_set_chan()
4401 		rf = 0xb3;  in run_rt3572_set_chan()
4403 		rf = 0xf6;  in run_rt3572_set_chan()
4405 		rf = 0xf4;  in run_rt3572_set_chan()
4407 		rf = 0xf3;  in run_rt3572_set_chan()
4408 	run_rt3070_rf_write(sc, 20, rf);  in run_rt3572_set_chan()
4412 		rf = 0x15;  in run_rt3572_set_chan()
4414 		rf = 0x3d;  in run_rt3572_set_chan()
4416 		rf = 0x01;  in run_rt3572_set_chan()
4417 	run_rt3070_rf_write(sc, 25, rf);  in run_rt3572_set_chan()
4432 	/* enable RF tuning */  in run_rt3572_set_chan()
4433 	run_rt3070_rf_read(sc, 7, &rf);  in run_rt3572_set_chan()
4434 	run_rt3070_rf_write(sc, 7, rf | 0x01);  in run_rt3572_set_chan()
4443 	uint8_t h20mhz, rf;  in run_rt3593_set_chan()  local
4465 	run_rt3070_rf_read(sc, 11, &rf);  in run_rt3593_set_chan()
4466 	rf = (rf & ~0x03) | (rt3070_freqs[i].r & 0x03);  in run_rt3593_set_chan()
4467 	run_rt3070_rf_write(sc, 11, rf);  in run_rt3593_set_chan()
4470 	run_rt3070_rf_read(sc, 11, &rf);  in run_rt3593_set_chan()
4471 	rf &= ~0x4c;  in run_rt3593_set_chan()
4472 	rf |= (chan <= 14) ? 0x44 : 0x48;  in run_rt3593_set_chan()
4473 	run_rt3070_rf_write(sc, 11, rf);  in run_rt3593_set_chan()
4476 		rf = txpow1 & 0x1f;  in run_rt3593_set_chan()
4478 		rf = 0x40 | ((txpow1 & 0x18) << 1) | (txpow1 & 0x07);  in run_rt3593_set_chan()
4479 	run_rt3070_rf_write(sc, 53, rf);  in run_rt3593_set_chan()
4482 		rf = txpow2 & 0x1f;  in run_rt3593_set_chan()
4484 		rf = 0x40 | ((txpow2 & 0x18) << 1) | (txpow2 & 0x07);  in run_rt3593_set_chan()
4485 	run_rt3070_rf_write(sc, 55, rf);  in run_rt3593_set_chan()
4488 		rf = txpow3 & 0x1f;  in run_rt3593_set_chan()
4490 		rf = 0x40 | ((txpow3 & 0x18) << 1) | (txpow3 & 0x07);  in run_rt3593_set_chan()
4491 	run_rt3070_rf_write(sc, 54, rf);  in run_rt3593_set_chan()
4493 	rf = RT3070_RF_BLOCK | RT3070_PLL_PD;  in run_rt3593_set_chan()
4495 		rf |= RT3070_TX0_PD | RT3070_TX1_PD | RT3070_TX2_PD;  in run_rt3593_set_chan()
4497 		rf |= RT3070_TX0_PD | RT3070_TX1_PD;  in run_rt3593_set_chan()
4498 	rf |= RT3070_RX0_PD | RT3070_RX1_PD | RT3070_RX2_PD;  in run_rt3593_set_chan()
4499 	run_rt3070_rf_write(sc, 1, rf);  in run_rt3593_set_chan()
4506 	run_rt3070_rf_read(sc, 30, &rf);  in run_rt3593_set_chan()
4507 	rf = (rf & ~0x06) | (h20mhz << 1) | (h20mhz << 2);  in run_rt3593_set_chan()
4508 	run_rt3070_rf_write(sc, 30, rf);  in run_rt3593_set_chan()
4510 	run_rt3070_rf_read(sc, 36, &rf);  in run_rt3593_set_chan()
4512 		rf |= 0x80;  in run_rt3593_set_chan()
4514 		rf &= ~0x80;  in run_rt3593_set_chan()
4515 	run_rt3070_rf_write(sc, 36, rf);  in run_rt3593_set_chan()
4523 	run_rt3070_rf_read(sc, 6, &rf);  in run_rt3593_set_chan()
4524 	rf &= ~0xc0;  in run_rt3593_set_chan()
4526 		rf |= 0x40;  in run_rt3593_set_chan()
4528 		rf |= 0x80;  in run_rt3593_set_chan()
4530 		rf |= 0x40;  in run_rt3593_set_chan()
4531 	run_rt3070_rf_write(sc, 6, rf);  in run_rt3593_set_chan()
4533 	run_rt3070_rf_read(sc, 30, &rf);  in run_rt3593_set_chan()
4534 	rf = (rf & ~0x18) | 0x10;  in run_rt3593_set_chan()
4535 	run_rt3070_rf_write(sc, 30, rf);  in run_rt3593_set_chan()
4540 	run_rt3070_rf_read(sc, 51, &rf);  in run_rt3593_set_chan()
4541 	rf = (rf & ~0x03) | 0x01;  in run_rt3593_set_chan()
4542 	run_rt3070_rf_write(sc, 51, rf);  in run_rt3593_set_chan()
4544 	run_rt3070_rf_read(sc, 51, &rf);  in run_rt3593_set_chan()
4545 	rf &= ~0x1c;  in run_rt3593_set_chan()
4546 	rf |= (chan <= 14) ? 0x14 : 0x10;  in run_rt3593_set_chan()
4547 	run_rt3070_rf_write(sc, 51, rf);  in run_rt3593_set_chan()
4549 	run_rt3070_rf_read(sc, 51, &rf);  in run_rt3593_set_chan()
4550 	rf &= ~0xe0;  in run_rt3593_set_chan()
4551 	rf |= (chan <= 14) ? 0x60 : 0x40;  in run_rt3593_set_chan()
4552 	run_rt3070_rf_write(sc, 51, rf);  in run_rt3593_set_chan()
4554 	run_rt3070_rf_read(sc, 49, &rf);  in run_rt3593_set_chan()
4555 	rf &= ~0x1c;  in run_rt3593_set_chan()
4556 	rf |= (chan <= 14) ? 0x0c : 0x08;  in run_rt3593_set_chan()
4557 	run_rt3070_rf_write(sc, 49, rf);  in run_rt3593_set_chan()
4559 	run_rt3070_rf_read(sc, 50, &rf);  in run_rt3593_set_chan()
4560 	run_rt3070_rf_write(sc, 50, rf & ~0x20);  in run_rt3593_set_chan()
4562 	run_rt3070_rf_read(sc, 57, &rf);  in run_rt3593_set_chan()
4563 	rf &= ~0xfc;  in run_rt3593_set_chan()
4564 	rf |= (chan <= 14) ?  0x6c : 0x3c;  in run_rt3593_set_chan()
4565 	run_rt3070_rf_write(sc, 57, rf);  in run_rt3593_set_chan()
4571 	run_rt3070_rf_read(sc, 3, &rf);  in run_rt3593_set_chan()
4572 	rf &= ~RT5390_VCOCAL;  in run_rt3593_set_chan()
4573 	rf |= (chan <= 14) ? RT5390_VCOCAL : 0xbe;  in run_rt3593_set_chan()
4574 	run_rt3070_rf_write(sc, 3, rf);  in run_rt3593_set_chan()
4577 		rf = 0x23;  in run_rt3593_set_chan()
4579 		rf = 0x36;  in run_rt3593_set_chan()
4581 		rf = 0x32;  in run_rt3593_set_chan()
4583 		rf = 0x30;  in run_rt3593_set_chan()
4584 	run_rt3070_rf_write(sc, 39, rf);  in run_rt3593_set_chan()
4586 		rf = 0xbb;  in run_rt3593_set_chan()
4588 		rf = 0xeb;  in run_rt3593_set_chan()
4590 		rf = 0xb3;  in run_rt3593_set_chan()
4592 		rf = 0x9b;  in run_rt3593_set_chan()
4593 	run_rt3070_rf_write(sc, 45, rf);  in run_rt3593_set_chan()
4603 	uint8_t rf;  in run_rt5390_set_chan()  local
4615 	run_rt3070_rf_read(sc, 11, &rf);  in run_rt5390_set_chan()
4616 	rf = (rf & ~0x03) | (rt3070_freqs[i].r & 0x03);  in run_rt5390_set_chan()
4617 	run_rt3070_rf_write(sc, 11, rf);  in run_rt5390_set_chan()
4619 	run_rt3070_rf_read(sc, 49, &rf);  in run_rt5390_set_chan()
4620 	rf = (rf & ~0x3f) | (txpow1 & 0x3f);  in run_rt5390_set_chan()
4621 	/* The valid range of the RF R49 is 0x00 to 0x27. */  in run_rt5390_set_chan()
4622 	if ((rf & 0x3f) > 0x27)  in run_rt5390_set_chan()
4623 		rf = (rf & ~0x3f) | 0x27;  in run_rt5390_set_chan()
4624 	run_rt3070_rf_write(sc, 49, rf);  in run_rt5390_set_chan()
4627 		run_rt3070_rf_read(sc, 50, &rf);  in run_rt5390_set_chan()
4628 		rf = (rf & ~0x3f) | (txpow2 & 0x3f);  in run_rt5390_set_chan()
4629 		/* The valid range of the RF R50 is 0x00 to 0x27. */  in run_rt5390_set_chan()
4630 		if ((rf & 0x3f) > 0x27)  in run_rt5390_set_chan()
4631 			rf = (rf & ~0x3f) | 0x27;  in run_rt5390_set_chan()
4632 		run_rt3070_rf_write(sc, 50, rf);  in run_rt5390_set_chan()
4635 	run_rt3070_rf_read(sc, 1, &rf);  in run_rt5390_set_chan()
4636 	rf |= RT3070_RF_BLOCK | RT3070_PLL_PD | RT3070_RX0_PD | RT3070_TX0_PD;  in run_rt5390_set_chan()
4638 		rf |= RT3070_RX1_PD | RT3070_TX1_PD;  in run_rt5390_set_chan()
4639 	run_rt3070_rf_write(sc, 1, rf);  in run_rt5390_set_chan()
4642 		run_rt3070_rf_read(sc, 2, &rf);  in run_rt5390_set_chan()
4643 		rf |= 0x80;  in run_rt5390_set_chan()
4644 		run_rt3070_rf_write(sc, 2, rf);  in run_rt5390_set_chan()
4646 		rf &= 0x7f;  in run_rt5390_set_chan()
4647 		run_rt3070_rf_write(sc, 2, rf);  in run_rt5390_set_chan()
4656 				rf = 0x0f;  in run_rt5390_set_chan()
4658 				rf = 0x0e;  in run_rt5390_set_chan()
4660 				rf = 0x0d;  in run_rt5390_set_chan()
4661 			run_rt3070_rf_write(sc, 23, rf);  in run_rt5390_set_chan()
4664 				rf = 0x0c;  in run_rt5390_set_chan()
4666 				rf = 0x0b;  in run_rt5390_set_chan()
4668 				rf = 0x0a;  in run_rt5390_set_chan()
4670 				rf = 0x09;  in run_rt5390_set_chan()
4672 				rf = 0x08;  in run_rt5390_set_chan()
4673 			run_rt3070_rf_write(sc, 59, rf);  in run_rt5390_set_chan()
4676 				rf = 0x0f;  in run_rt5390_set_chan()
4678 				rf = 0x0b;  in run_rt5390_set_chan()
4679 			run_rt3070_rf_write(sc, 59, rf);  in run_rt5390_set_chan()
4685 				rf = 0x43;  in run_rt5390_set_chan()
4687 				rf = 0x23;  in run_rt5390_set_chan()
4688 			run_rt3070_rf_write(sc, 55, rf);  in run_rt5390_set_chan()
4691 				rf = 0x0f;  in run_rt5390_set_chan()
4693 				rf = 0x0d;  in run_rt5390_set_chan()
4695 				rf = 0x0b;  in run_rt5390_set_chan()
4696 			run_rt3070_rf_write(sc, 59, rf);  in run_rt5390_set_chan()
4704 	run_rt3070_rf_read(sc, 3, &rf);  in run_rt5390_set_chan()
4705 	rf |= RT5390_VCOCAL;  in run_rt5390_set_chan()
4706 	run_rt3070_rf_write(sc, 3, rf);  in run_rt5390_set_chan()
4714 	uint8_t reg, rf, txpow_bound;  in run_rt5592_set_chan()  local
4737 	run_rt3070_rf_read(sc, 9, &rf);  in run_rt5592_set_chan()
4738 	rf &= ~(1 << 4);  in run_rt5592_set_chan()
4739 	rf |= ((freqs->n & 0x0100) >> 8) << 4;  in run_rt5592_set_chan()
4740 	run_rt3070_rf_write(sc, 9, rf);  in run_rt5592_set_chan()
4743 	run_rt3070_rf_read(sc, 9, &rf);  in run_rt5592_set_chan()
4744 	rf &= ~0x0f;  in run_rt5592_set_chan()
4745 	rf |= (freqs->k & 0x0f);  in run_rt5592_set_chan()
4746 	run_rt3070_rf_write(sc, 9, rf);  in run_rt5592_set_chan()
4749 	run_rt3070_rf_read(sc, 11, &rf);  in run_rt5592_set_chan()
4750 	rf &= ~0x0c;  in run_rt5592_set_chan()
4751 	rf |= ((freqs->m - 0x8) & 0x3) << 2;  in run_rt5592_set_chan()
4752 	run_rt3070_rf_write(sc, 11, rf);  in run_rt5592_set_chan()
4753 	run_rt3070_rf_read(sc, 9, &rf);  in run_rt5592_set_chan()
4754 	rf &= ~(1 << 7);  in run_rt5592_set_chan()
4755 	rf |= (((freqs->m - 0x8) & 0x4) >> 2) << 7;  in run_rt5592_set_chan()
4756 	run_rt3070_rf_write(sc, 9, rf);  in run_rt5592_set_chan()
4759 	run_rt3070_rf_read(sc, 11, &rf);  in run_rt5592_set_chan()
4760 	rf &= ~0x03;  in run_rt5592_set_chan()
4761 	rf |= (freqs->r - 0x1);  in run_rt5592_set_chan()
4762 	run_rt3070_rf_write(sc, 11, rf);  in run_rt5592_set_chan()
4765 		/* Initialize RF registers for 2GHZ. */  in run_rt5592_set_chan()
4771 		rf = (chan <= 10) ? 0x07 : 0x06;  in run_rt5592_set_chan()
4772 		run_rt3070_rf_write(sc, 23, rf);  in run_rt5592_set_chan()
4773 		run_rt3070_rf_write(sc, 59, rf);  in run_rt5592_set_chan()
4778 		 * RF R49/R50 Tx power ALC code.  in run_rt5592_set_chan()
4784 		/* Initialize RF registers for 5GHZ. */  in run_rt5592_set_chan()
4798 		 * RF R49/R50 Tx power ALC code.  in run_rt5592_set_chan()
4805 	/* RF R49 ch0 Tx power ALC code. */  in run_rt5592_set_chan()
4806 	run_rt3070_rf_read(sc, 49, &rf);  in run_rt5592_set_chan()
4807 	rf &= ~0xc0;  in run_rt5592_set_chan()
4808 	rf |= (reg << 6);  in run_rt5592_set_chan()
4809 	rf = (rf & ~0x3f) | (txpow1 & 0x3f);  in run_rt5592_set_chan()
4810 	if ((rf & 0x3f) > txpow_bound)  in run_rt5592_set_chan()
4811 		rf = (rf & ~0x3f) | txpow_bound;  in run_rt5592_set_chan()
4812 	run_rt3070_rf_write(sc, 49, rf);  in run_rt5592_set_chan()
4814 	/* RF R50 ch1 Tx power ALC code. */  in run_rt5592_set_chan()
4815 	run_rt3070_rf_read(sc, 50, &rf);  in run_rt5592_set_chan()
4816 	rf &= ~(1 << 7 | 1 << 6);  in run_rt5592_set_chan()
4817 	rf |= (reg << 6);  in run_rt5592_set_chan()
4818 	rf = (rf & ~0x3f) | (txpow2 & 0x3f);  in run_rt5592_set_chan()
4819 	if ((rf & 0x3f) > txpow_bound)  in run_rt5592_set_chan()
4820 		rf = (rf & ~0x3f) | txpow_bound;  in run_rt5592_set_chan()
4821 	run_rt3070_rf_write(sc, 50, rf);  in run_rt5592_set_chan()
4824 	run_rt3070_rf_read(sc, 1, &rf);  in run_rt5592_set_chan()
4825 	rf |= (RT3070_RF_BLOCK | RT3070_PLL_PD | RT3070_RX0_PD | RT3070_TX0_PD);  in run_rt5592_set_chan()
4827 		rf |= RT3070_TX1_PD;  in run_rt5592_set_chan()
4829 		rf |= RT3070_RX1_PD;  in run_rt5592_set_chan()
4830 	run_rt3070_rf_write(sc, 1, rf);  in run_rt5592_set_chan()
4841 	run_rt3070_rf_read(sc, 3, &rf);  in run_rt5592_set_chan()
4842 	rf |= RT5390_VCOCAL;  in run_rt5592_set_chan()
4843 	run_rt3070_rf_write(sc, 3, rf);  in run_rt5592_set_chan()
5518 	uint8_t bbp4, mingain, rf, target;  in run_rt3070_rf_init()  local
5521 	run_rt3070_rf_read(sc, 30, &rf);  in run_rt3070_rf_init()
5522 	/* toggle RF R30 bit 7 */  in run_rt3070_rf_init()
5523 	run_rt3070_rf_write(sc, 30, rf | 0x80);  in run_rt3070_rf_init()
5525 	run_rt3070_rf_write(sc, 30, rf & ~0x80);  in run_rt3070_rf_init()
5527 	/* initialize RF registers to default value */  in run_rt3070_rf_init()
5551 		run_rt3070_rf_read(sc, 6, &rf);  in run_rt3070_rf_init()
5552 		run_rt3070_rf_write(sc, 6, rf | 0x40);  in run_rt3070_rf_init()
5568 		run_rt3070_rf_read(sc, 6, &rf);  in run_rt3070_rf_init()
5569 		run_rt3070_rf_write(sc, 6, rf | 0x40);  in run_rt3070_rf_init()
5585 	run_rt3070_rf_read(sc, 31, &rf);  in run_rt3070_rf_init()
5586 	run_rt3070_rf_write(sc, 31, rf & ~0x20);  in run_rt3070_rf_init()
5596 	run_rt3070_rf_read(sc, 31, &rf);  in run_rt3070_rf_init()
5597 	run_rt3070_rf_write(sc, 31, rf | 0x20);  in run_rt3070_rf_init()
5619 		run_rt3070_rf_read(sc, 17, &rf);  in run_rt3070_rf_init()
5620 		rf &= ~RT3070_TX_LO1;  in run_rt3070_rf_init()
5624 			rf |= 0x20;	/* fix for long range Rx issue */  in run_rt3070_rf_init()
5627 			rf = (rf & ~0x7) | sc->txmixgain_2ghz;  in run_rt3070_rf_init()
5628 		run_rt3070_rf_write(sc, 17, rf);  in run_rt3070_rf_init()
5632 		run_rt3070_rf_read(sc, 1, &rf);  in run_rt3070_rf_init()
5633 		rf &= ~(RT3070_RX0_PD | RT3070_TX0_PD);  in run_rt3070_rf_init()
5634 		rf |= RT3070_RF_BLOCK | RT3070_RX1_PD | RT3070_TX1_PD;  in run_rt3070_rf_init()
5635 		run_rt3070_rf_write(sc, 1, rf);  in run_rt3070_rf_init()
5637 		run_rt3070_rf_read(sc, 15, &rf);  in run_rt3070_rf_init()
5638 		run_rt3070_rf_write(sc, 15, rf & ~RT3070_TX_LO2);  in run_rt3070_rf_init()
5640 		run_rt3070_rf_read(sc, 20, &rf);  in run_rt3070_rf_init()
5641 		run_rt3070_rf_write(sc, 20, rf & ~RT3070_RX_LO1);  in run_rt3070_rf_init()
5643 		run_rt3070_rf_read(sc, 21, &rf);  in run_rt3070_rf_init()
5644 		run_rt3070_rf_write(sc, 21, rf & ~RT3070_RX_LO2);  in run_rt3070_rf_init()
5648 		/* fix Tx to Rx IQ glitch by raising RF voltage */  in run_rt3070_rf_init()
5649 		run_rt3070_rf_read(sc, 27, &rf);  in run_rt3070_rf_init()
5650 		rf &= ~0x77;  in run_rt3070_rf_init()
5652 			rf |= 0x03;  in run_rt3070_rf_init()
5653 		run_rt3070_rf_write(sc, 27, rf);  in run_rt3070_rf_init()
5662 	uint8_t rf;  in run_rt3593_rf_init()  local
5670 	/* Initialize RF registers to default value. */  in run_rt3593_rf_init()
5676 	/* Toggle RF R2 to initiate calibration. */  in run_rt3593_rf_init()
5679 	/* Initialize RF frequency offset. */  in run_rt3593_rf_init()
5682 	run_rt3070_rf_read(sc, 18, &rf);  in run_rt3593_rf_init()
5683 	run_rt3070_rf_write(sc, 18, rf | RT3593_AUTOTUNE_BYPASS);  in run_rt3593_rf_init()
5711 	uint8_t rf;  in run_rt5390_rf_init()  local
5714 	/* Toggle RF R2 to initiate calibration. */  in run_rt5390_rf_init()
5716 		run_rt3070_rf_read(sc, 2, &rf);  in run_rt5390_rf_init()
5717 		run_rt3070_rf_write(sc, 2, rf | RT5390_RESCAL);  in run_rt5390_rf_init()
5719 		run_rt3070_rf_write(sc, 2, rf & ~RT5390_RESCAL);  in run_rt5390_rf_init()
5725 	/* Initialize RF registers to default value. */  in run_rt5390_rf_init()
5731 		/* Initialize RF frequency offset. */  in run_rt5390_rf_init()
5839 	uint8_t bbp, rf;  in run_rt3070_rf_setup()  local
5860 		run_rt3070_rf_read(sc, 16, &rf);  in run_rt3070_rf_setup()
5861 		rf = (rf & ~0x07) | sc->txmixgain_2ghz;  in run_rt3070_rf_setup()
5862 		run_rt3070_rf_write(sc, 16, rf);  in run_rt3070_rf_setup()
5905 	/* initialize RF registers from ROM for >=RT3071*/  in run_rt3070_rf_setup()
5908 			if (sc->rf[i].reg == 0 || sc->rf[i].reg == 0xff)  in run_rt3070_rf_setup()
5910 			run_rt3070_rf_write(sc, sc->rf[i].reg, sc->rf[i].val);  in run_rt3070_rf_setup()
5918 	uint8_t bbp, rf;  in run_rt3593_rf_setup()  local
5931 	run_rt3070_rf_read(sc, 50, &rf);  in run_rt3593_rf_setup()
5932 	run_rt3070_rf_write(sc, 50, rf & ~RT3593_TX_LO2);  in run_rt3593_rf_setup()
5934 	run_rt3070_rf_read(sc, 51, &rf);  in run_rt3593_rf_setup()
5935 	rf = (rf & ~(RT3593_TX_LO1 | 0x0c)) |  in run_rt3593_rf_setup()
5937 	run_rt3070_rf_write(sc, 51, rf);  in run_rt3593_rf_setup()
5939 	run_rt3070_rf_read(sc, 38, &rf);  in run_rt3593_rf_setup()
5940 	run_rt3070_rf_write(sc, 38, rf & ~RT5390_RX_LO1);  in run_rt3593_rf_setup()
5942 	run_rt3070_rf_read(sc, 39, &rf);  in run_rt3593_rf_setup()
5943 	run_rt3070_rf_write(sc, 39, rf & ~RT5390_RX_LO2);  in run_rt3593_rf_setup()
5945 	run_rt3070_rf_read(sc, 1, &rf);  in run_rt3593_rf_setup()
5946 	run_rt3070_rf_write(sc, 1, rf & ~(RT3070_RF_BLOCK | RT3070_PLL_PD));  in run_rt3593_rf_setup()
5948 	run_rt3070_rf_read(sc, 30, &rf);  in run_rt3593_rf_setup()
5949 	rf = (rf & ~0x18) | 0x10;  in run_rt3593_rf_setup()
5950 	run_rt3070_rf_write(sc, 30, rf);  in run_rt3593_rf_setup()
5988 	uint8_t bbp, rf;  in run_rt5390_rf_setup()  local
6008 	run_rt3070_rf_read(sc, 38, &rf);  in run_rt5390_rf_setup()
6009 	run_rt3070_rf_write(sc, 38, rf & ~RT5390_RX_LO1);  in run_rt5390_rf_setup()
6011 	run_rt3070_rf_read(sc, 39, &rf);  in run_rt5390_rf_setup()
6012 	run_rt3070_rf_write(sc, 39, rf & ~RT5390_RX_LO2);  in run_rt5390_rf_setup()
6018 	run_rt3070_rf_read(sc, 30, &rf);  in run_rt5390_rf_setup()
6019 	rf = (rf & ~0x18) | 0x10;  in run_rt5390_rf_setup()
6020 	run_rt3070_rf_write(sc, 30, rf);  in run_rt5390_rf_setup()
6081 	uint8_t rf, tmp;  in run_adjust_freq_offset()  local
6083 	run_rt3070_rf_read(sc, 17, &rf);  in run_adjust_freq_offset()
6084 	tmp = rf;  in run_adjust_freq_offset()
6085 	rf = (rf & ~0x7f) | (sc->freq & 0x7f);  in run_adjust_freq_offset()
6086 	rf = MIN(rf, 0x5f);  in run_adjust_freq_offset()
6088 	if (tmp != rf)  in run_adjust_freq_offset()
6089 		run_mcu_cmd(sc, 0x74, (tmp << 8 ) | rf);  in run_adjust_freq_offset()