Lines Matching +full:wakeup +full:- +full:active +full:- +full:high
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
50 #define MCS7840_DEV_REG_PINPONGHIGH 0x02 /* High bits of ping-pong
52 #define MCS7840_DEV_REG_PINPONGLOW 0x03 /* Low bits of ping-pong
67 #define MCS7840_DEV_REG_PLL_DIV_M 0x0e /* Pre-diviedr for PLL, R/W */
78 /* DCRx_2-DCRx_4 Registers goes here (see below, they are documented) */
109 #define MCS7840_DEV_REG_BI_FIFO_STAT1 0x32 /* Bulk-In FIFO Stat for Port
112 #define MCS7840_DEV_REG_BO_FIFO_STAT1 0x33 /* Bulk-out FIFO Stat for Port
115 #define MCS7840_DEV_REG_BI_FIFO_STAT2 0x34 /* Bulk-In FIFO Stat for Port
118 #define MCS7840_DEV_REG_BO_FIFO_STAT2 0x35 /* Bulk-out FIFO Stat for Port
121 #define MCS7840_DEV_REG_BI_FIFO_STAT3 0x36 /* Bulk-In FIFO Stat for Port
124 #define MCS7840_DEV_REG_BO_FIFO_STAT3 0x37 /* Bulk-out FIFO Stat for Port
127 #define MCS7840_DEV_REG_BI_FIFO_STAT4 0x38 /* Bulk-In FIFO Stat for Port
130 #define MCS7840_DEV_REG_BO_FIFO_STAT4 0x39 /* Bulk-out FIFO Stat for Port
144 * value for Bulk-Out for Port
146 #define MCS7840_DEV_REG_THR_VAL_HIGH1 0x40 /* High 1 bit of threshold
147 * value for Bulk-Out and
150 * value for Bulk-Out for Port
152 #define MCS7840_DEV_REG_THR_VAL_HIGH2 0x42 /* High 1 bit of threshold
153 * value for Bulk-Out and
156 * value for Bulk-Out for Port
158 #define MCS7840_DEV_REG_THR_VAL_HIGH3 0x44 /* High 1 bit of threshold
159 * value for Bulk-Out and
162 * value for Bulk-Out for Port
164 #define MCS7840_DEV_REG_THR_VAL_HIGH4 0x46 /* High 1 bit of threshold
165 * value for Bulk-Out and
169 #define MCS7840_DEV_SPx_LOOP_PIPES 0x01 /* Loop Bulk-Out FIFO to the
170 * Bulk-In FIFO, default = 0 */
174 #define MCS7840_DEV_SPx_RESET_OUT_FIFO 0x04 /* Reset Bulk-Out FIFO */
175 #define MCS7840_DEV_SPx_RESET_IN_FIFO 0x08 /* Reset Bulk-In FIFO */
219 * RS-232/RS-485 mode,
230 * for Bulk-In FIFOs are swapped. One of buffers is used
240 * THIS ONE IS UNDOCUMENTED IN FULL DATASHEET, but e-mail from tech support
243 * authors as "number of port" indicator, grounded (0) for two-port
244 * devices and pulled-up to 1 for 4-port devices.
255 * Default PLL input frequency Fin is 12Mhz (on-chip).
276 #define MCS7840_DEV_CLOCK_MUX_INEXTRN 0x01 /* External (device-depended)
281 * 20MHz-100MHz (default), 1 =
282 * 100MHz-300MHz range */
318 * (device-dependend) */
324 #define MCS7840_DEV_MODE_RESET 0x02 /* 0: RESET = Active High
331 #define MCS7840_DEV_MODE_PORBYPASS 0x10 /* 1: Power-On Reset is
334 * active, 1: 2 Serial Ports /
335 * IrDA active */
375 #define MCS7840_DEV_ZERO_PERIODx_DEF 20 /* Number of Bulk-in requests
376 * befor sending zero-sized
381 * zero-sized replies for port
384 * zero-sized replies for port
387 * zero-sized replies for port
390 * zero-sized replies for port
432 #define MCS7840_DEV_DCR0_GPIO_MODE_IN 0x00 /* GPIO Mode - Input
435 #define MCS7840_DEV_DCR0_GPIO_MODE_OUT 0x08 /* GPIO Mode - Input
438 #define MCS7840_DEV_DCR0_RTS_ACTIVE_HIGH 0x10 /* RTS Active is HIGH,
474 * Wakeup */
486 * Wakeup will work only if DCR0_IRDA = 0 (RS-xxx mode) and
487 * DCR1_WAKEUP_DISABLE = 0 (wakeup enabled).
489 #define MCS7840_DEV_DCR2_WAKEUP_CTS 0x01 /* Wakeup on CTS change,
491 #define MCS7840_DEV_DCR2_WAKEUP_DCD 0x02 /* Wakeup on DCD change,
493 #define MCS7840_DEV_DCR2_WAKEUP_RI 0x04 /* Wakeup on RI change,
495 #define MCS7840_DEV_DCR2_WAKEUP_DSR 0x08 /* Wakeup on DSR change,
497 #define MCS7840_DEV_DCR2_WAKEUP_RXD 0x10 /* Wakeup on RX Data change,
499 #define MCS7840_DEV_DCR2_WAKEUP_RESUME 0x20 /* Wakeup issues RESUME
503 #define MCS7840_DEV_DCR2_SHDN_POLARITY 0x80 /* 0: Pin 12 Active Low, 1:
504 * Pin 12 Active High, default
510 * Thesse can be calculated as "1 << portnumber" for Bulk-out and
511 * "1 << (portnumber+1)" for Bulk-in
527 #define MCS7840_UART_REG_IER 0x01 /* Interrupt enable register -
529 #define MCS7840_UART_REG_FCR 0x02 /* FIFO Control register -
541 #define MCS7840_UART_REG_DLM 0x01 /* High bits of BAUD divider */
581 #define MCS7840_UART_LCR_STOPB2 0x04 /* 1.5-2 stop bits depends on
585 #define MCS7840_UART_LCR_PARITYON 0x08 /* Parity ON/OFF - ON */
606 #define MCS7840_UART_MCR_DTR 0x01 /* Force DTR to be active
608 #define MCS7840_UART_MCR_RTS 0x02 /* Force RTS to be active
627 * high since last read */
636 #define MCS7840_UART_SCRATCHPAD_RS232 0x00 /* RS-485 disabled */
637 #define MCS7840_UART_SCRATCHPAD_RS485_DTRRX 0x80 /* RS-485 mode, DTR High
639 #define MCS7840_UART_SCRATCHPAD_RS485_DTRTX 0xc0 /* RS-485 mode, DTR High