Lines Matching +full:uart +full:- +full:w +full:- +full:state
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
47 #define MCS7840_DEV_REG_SP1 0x00 /* Options for UART 1, R/W */
48 #define MCS7840_DEV_REG_CONTROL1 0x01 /* Control bits for UART 1,
49 * R/W */
50 #define MCS7840_DEV_REG_PINPONGHIGH 0x02 /* High bits of ping-pong
51 * register, R/W */
52 #define MCS7840_DEV_REG_PINPONGLOW 0x03 /* Low bits of ping-pong
53 * register, R/W */
57 * below R/W */
58 #define MCS7840_DEV_REG_SP2 0x08 /* Options for UART 2, R/W */
59 #define MCS7840_DEV_REG_CONTROL2 0x09 /* Control bits for UART 2,
60 * R/W */
61 #define MCS7840_DEV_REG_SP3 0x0a /* Options for UART 3, R/W */
62 #define MCS7840_DEV_REG_CONTROL3 0x0b /* Control bits for UART 3,
63 * R/W */
64 #define MCS7840_DEV_REG_SP4 0x0c /* Options for UART 4, R/W */
65 #define MCS7840_DEV_REG_CONTROL4 0x0d /* Control bits for UART 4,
66 * R/W */
67 #define MCS7840_DEV_REG_PLL_DIV_M 0x0e /* Pre-diviedr for PLL, R/W */
69 #define MCS7840_DEV_REG_PLL_DIV_N 0x10 /* Loop divider for PLL, R/W */
71 * endpoint control, R/W */
74 * 2, R/W */
76 * 4, R/W */
78 /* DCRx_2-DCRx_4 Registers goes here (see below, they are documented) */
95 * R/W */
98 * R/W */
101 * R/W */
104 * R/W */
106 * 2, R/W */
108 * 4, R/W */
109 #define MCS7840_DEV_REG_BI_FIFO_STAT1 0x32 /* Bulk-In FIFO Stat for Port
112 #define MCS7840_DEV_REG_BO_FIFO_STAT1 0x33 /* Bulk-out FIFO Stat for Port
115 #define MCS7840_DEV_REG_BI_FIFO_STAT2 0x34 /* Bulk-In FIFO Stat for Port
118 #define MCS7840_DEV_REG_BO_FIFO_STAT2 0x35 /* Bulk-out FIFO Stat for Port
121 #define MCS7840_DEV_REG_BI_FIFO_STAT3 0x36 /* Bulk-In FIFO Stat for Port
124 #define MCS7840_DEV_REG_BO_FIFO_STAT3 0x37 /* Bulk-out FIFO Stat for Port
127 #define MCS7840_DEV_REG_BI_FIFO_STAT4 0x38 /* Bulk-In FIFO Stat for Port
130 #define MCS7840_DEV_REG_BO_FIFO_STAT4 0x39 /* Bulk-out FIFO Stat for Port
134 * frames for Port 1, R/W */
136 * frames for Port 1, R/W */
138 * frames for Port 1, R/W */
140 * frames for Port 1, R/W */
142 * frames, R/W */
144 * value for Bulk-Out for Port
145 * 1, R/W */
147 * value for Bulk-Out and
148 * enable flag for Port 1, R/W */
150 * value for Bulk-Out for Port
151 * 2, R/W */
153 * value for Bulk-Out and
154 * enable flag for Port 2, R/W */
156 * value for Bulk-Out for Port
157 * 3, R/W */
159 * value for Bulk-Out and
160 * enable flag for Port 3, R/W */
162 * value for Bulk-Out for Port
163 * 4, R/W */
165 * value for Bulk-Out and
166 * enable flag for Port 4, R/W */
169 #define MCS7840_DEV_SPx_LOOP_PIPES 0x01 /* Loop Bulk-Out FIFO to the
170 * Bulk-In FIFO, default = 0 */
171 #define MCS7840_DEV_SPx_SKIP_ERR_DATA 0x02 /* Drop data bytes from UART,
174 #define MCS7840_DEV_SPx_RESET_OUT_FIFO 0x04 /* Reset Bulk-Out FIFO */
175 #define MCS7840_DEV_SPx_RESET_IN_FIFO 0x08 /* Reset Bulk-In FIFO */
196 #define MCS7840_DEV_SPx_UART_RESET 0x80 /* Reset UART */
219 * RS-232/RS-485 mode,
230 * for Bulk-In FIFOs are swapped. One of buffers is used
231 * for USB trnasfer, other for receiving data from UART.
240 * THIS ONE IS UNDOCUMENTED IN FULL DATASHEET, but e-mail from tech support
243 * authors as "number of port" indicator, grounded (0) for two-port
244 * devices and pulled-up to 1 for 4-port devices.
255 * Default PLL input frequency Fin is 12Mhz (on-chip).
276 #define MCS7840_DEV_CLOCK_MUX_INEXTRN 0x01 /* External (device-depended)
281 * 20MHz-100MHz (default), 1 =
282 * 100MHz-300MHz range */
318 * (device-dependend) */
331 #define MCS7840_DEV_MODE_PORBYPASS 0x10 /* 1: Power-On Reset is
375 #define MCS7840_DEV_ZERO_PERIODx_DEF 20 /* Number of Bulk-in requests
376 * befor sending zero-sized
381 * zero-sized replies for port
384 * zero-sized replies for port
387 * zero-sized replies for port
390 * zero-sized replies for port
401 * 1, R/W */
403 * 1, R/W */
405 * 1, R/W */
407 * 2, R/W */
409 * 2, R/W */
411 * 2, R/W */
413 * 3, R/W */
415 * 3, R/W */
417 * 3, R/W */
419 * 4, R/W */
421 * 4, R/W */
423 * 4, R/W */
432 #define MCS7840_DEV_DCR0_GPIO_MODE_IN 0x00 /* GPIO Mode - Input
435 #define MCS7840_DEV_DCR0_GPIO_MODE_OUT 0x08 /* GPIO Mode - Input
441 * state of TX buffer,
463 #define MCS7840_DEV_DCR1_UART_CURRENT_MASK 0x0c /* Mask to extract UART
465 #define MCS7840_DEV_DCR1_UART_CURRENT_6MA 0x00 /* UART output current
467 #define MCS7840_DEV_DCR1_UART_CURRENT_8MA 0x04 /* UART output current
469 #define MCS7840_DEV_DCR1_UART_CURRENT_10MA 0x08 /* UART output current
471 #define MCS7840_DEV_DCR1_UART_CURRENT_12MA 0x0c /* UART output current
486 * Wakeup will work only if DCR0_IRDA = 0 (RS-xxx mode) and
510 * Thesse can be calculated as "1 << portnumber" for Bulk-out and
511 * "1 << (portnumber+1)" for Bulk-in
522 /* Documented UART registers (fully compatible with 16550 UART) */
524 * Register W/Only */
527 #define MCS7840_UART_REG_IER 0x01 /* Interrupt enable register -
528 * R/W */
529 #define MCS7840_UART_REG_FCR 0x02 /* FIFO Control register -
530 * W/Only */
533 #define MCS7840_UART_REG_LCR 0x03 /* Line control register R/W */
534 #define MCS7840_UART_REG_MCR 0x04 /* Modem control register R/W */
581 #define MCS7840_UART_LCR_STOPB2 0x04 /* 1.5-2 stop bits depends on
585 #define MCS7840_UART_LCR_PARITYON 0x08 /* Parity ON/OFF - ON */
636 #define MCS7840_UART_SCRATCHPAD_RS232 0x00 /* RS-485 disabled */
637 #define MCS7840_UART_SCRATCHPAD_RS485_DTRRX 0x80 /* RS-485 mode, DTR High
639 #define MCS7840_UART_SCRATCHPAD_RS485_DTRTX 0xc0 /* RS-485 mode, DTR High