Lines Matching +full:rx +full:- +full:input +full:- +full:m
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
50 #define MCS7840_DEV_REG_PINPONGHIGH 0x02 /* High bits of ping-pong
52 #define MCS7840_DEV_REG_PINPONGLOW 0x03 /* Low bits of ping-pong
67 #define MCS7840_DEV_REG_PLL_DIV_M 0x0e /* Pre-diviedr for PLL, R/W */
70 #define MCS7840_DEV_REG_CLOCK_MUX 0x12 /* PLL input clock & Interrupt
78 /* DCRx_2-DCRx_4 Registers goes here (see below, they are documented) */
105 #define MCS7840_DEV_REG_RX_SAMPLING12 0x30 /* RX sampling for ports 1 &
107 #define MCS7840_DEV_REG_RX_SAMPLING34 0x31 /* RX sampling for ports 3 &
109 #define MCS7840_DEV_REG_BI_FIFO_STAT1 0x32 /* Bulk-In FIFO Stat for Port
112 #define MCS7840_DEV_REG_BO_FIFO_STAT1 0x33 /* Bulk-out FIFO Stat for Port
115 #define MCS7840_DEV_REG_BI_FIFO_STAT2 0x34 /* Bulk-In FIFO Stat for Port
118 #define MCS7840_DEV_REG_BO_FIFO_STAT2 0x35 /* Bulk-out FIFO Stat for Port
121 #define MCS7840_DEV_REG_BI_FIFO_STAT3 0x36 /* Bulk-In FIFO Stat for Port
124 #define MCS7840_DEV_REG_BO_FIFO_STAT3 0x37 /* Bulk-out FIFO Stat for Port
127 #define MCS7840_DEV_REG_BI_FIFO_STAT4 0x38 /* Bulk-In FIFO Stat for Port
130 #define MCS7840_DEV_REG_BO_FIFO_STAT4 0x39 /* Bulk-out FIFO Stat for Port
144 * value for Bulk-Out for Port
147 * value for Bulk-Out and
150 * value for Bulk-Out for Port
153 * value for Bulk-Out and
156 * value for Bulk-Out for Port
159 * value for Bulk-Out and
162 * value for Bulk-Out for Port
165 * value for Bulk-Out and
169 #define MCS7840_DEV_SPx_LOOP_PIPES 0x01 /* Loop Bulk-Out FIFO to the
170 * Bulk-In FIFO, default = 0 */
174 #define MCS7840_DEV_SPx_RESET_OUT_FIFO 0x04 /* Reset Bulk-Out FIFO */
175 #define MCS7840_DEV_SPx_RESET_IN_FIFO 0x08 /* Reset Bulk-In FIFO */
214 #define MCS7840_DEV_CONTROLx_RX_NEGATE 0x10 /* Negate RX input,
217 #define MCS7840_DEV_CONTROLx_RX_DISABLE 0x20 /* Disable RX logic,
219 * RS-232/RS-485 mode,
221 #define MCS7840_DEV_CONTROLx_FSM_CONTROL 0x40 /* Disable RX FSM when
229 * These registers control how often two input buffers
230 * for Bulk-In FIFOs are swapped. One of buffers is used
240 * THIS ONE IS UNDOCUMENTED IN FULL DATASHEET, but e-mail from tech support
241 * confirms, that it is register for GPIO_0 and GPIO_1 data input/output.
243 * authors as "number of port" indicator, grounded (0) for two-port
244 * devices and pulled-up to 1 for 4-port devices.
254 * Fout = (N/M) * Fin.
255 * Default PLL input frequency Fin is 12Mhz (on-chip).
257 #define MCS7840_DEV_PLL_DIV_M_BITS 6 /* Number of useful bits for M
259 #define MCS7840_DEV_PLL_DIV_M_MASK 0x3f /* Mask for M divider */
260 #define MCS7840_DEV_PLL_DIV_M_MIN 1 /* Minimum value for M, 0 is
262 #define MCS7840_DEV_PLL_DIV_M_DEF 1 /* Default value for M */
263 #define MCS7840_DEV_PLL_DIV_M_MAX 63 /* Maximum value for M */
274 * input */
275 #define MCS7840_DEV_CLOCK_MUX_IN12MHZ 0x00 /* 12Mhz PLL input, default */
276 #define MCS7840_DEV_CLOCK_MUX_INEXTRN 0x01 /* External (device-depended)
277 * PLL input */
281 * 20MHz-100MHz (default), 1 =
282 * 100MHz-300MHz range */
315 #define MCS7840_DEV_CLOCK_SELECT_PLL 0x04 /* PLL output (see for M and N
317 #define MCS7840_DEV_CLOCK_SELECT_EXT 0x05 /* External clock input
318 * (device-dependend) */
331 #define MCS7840_DEV_MODE_PORBYPASS 0x10 /* 1: Power-On Reset is
369 #define MCS7840_DEV_RX_SAMPLINGx_MIN 0 /* Max for any RX Sampling */
370 #define MCS7840_DEV_RX_SAMPLINGx_DEF 7 /* Default for any RX
372 #define MCS7840_DEV_RX_SAMPLINGx_MAX 15 /* Min for any RX Sampling */
375 #define MCS7840_DEV_ZERO_PERIODx_DEF 20 /* Number of Bulk-in requests
376 * befor sending zero-sized
381 * zero-sized replies for port
384 * zero-sized replies for port
387 * zero-sized replies for port
390 * zero-sized replies for port
432 #define MCS7840_DEV_DCR0_GPIO_MODE_IN 0x00 /* GPIO Mode - Input
435 #define MCS7840_DEV_DCR0_GPIO_MODE_OUT 0x08 /* GPIO Mode - Input
486 * Wakeup will work only if DCR0_IRDA = 0 (RS-xxx mode) and
497 #define MCS7840_DEV_DCR2_WAKEUP_RXD 0x10 /* Wakeup on RX Data change,
510 * Thesse can be calculated as "1 << portnumber" for Bulk-out and
511 * "1 << (portnumber+1)" for Bulk-in
527 #define MCS7840_UART_REG_IER 0x01 /* Interrupt enable register -
529 #define MCS7840_UART_REG_FCR 0x02 /* FIFO Control register -
544 #define MCS7840_UART_IER_RXREADY 0x01 /* RX Ready interrumpt mask */
546 #define MCS7840_UART_IER_RXSTAT 0x04 /* RX Status interrumpt mask */
581 #define MCS7840_UART_LCR_STOPB2 0x04 /* 1.5-2 stop bits depends on
585 #define MCS7840_UART_LCR_PARITYON 0x08 /* Parity ON/OFF - ON */
636 #define MCS7840_UART_SCRATCHPAD_RS232 0x00 /* RS-485 disabled */
637 #define MCS7840_UART_SCRATCHPAD_RS485_DTRRX 0x80 /* RS-485 mode, DTR High
638 * = RX */
639 #define MCS7840_UART_SCRATCHPAD_RS485_DTRTX 0xc0 /* RS-485 mode, DTR High