Lines Matching +full:output +full:- +full:enable +full:- +full:active
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
50 #define MCS7840_DEV_REG_PINPONGHIGH 0x02 /* High bits of ping-pong
52 #define MCS7840_DEV_REG_PINPONGLOW 0x03 /* Low bits of ping-pong
67 #define MCS7840_DEV_REG_PLL_DIV_M 0x0e /* Pre-diviedr for PLL, R/W */
78 /* DCRx_2-DCRx_4 Registers goes here (see below, they are documented) */
109 #define MCS7840_DEV_REG_BI_FIFO_STAT1 0x32 /* Bulk-In FIFO Stat for Port
112 #define MCS7840_DEV_REG_BO_FIFO_STAT1 0x33 /* Bulk-out FIFO Stat for Port
115 #define MCS7840_DEV_REG_BI_FIFO_STAT2 0x34 /* Bulk-In FIFO Stat for Port
118 #define MCS7840_DEV_REG_BO_FIFO_STAT2 0x35 /* Bulk-out FIFO Stat for Port
121 #define MCS7840_DEV_REG_BI_FIFO_STAT3 0x36 /* Bulk-In FIFO Stat for Port
124 #define MCS7840_DEV_REG_BO_FIFO_STAT3 0x37 /* Bulk-out FIFO Stat for Port
127 #define MCS7840_DEV_REG_BI_FIFO_STAT4 0x38 /* Bulk-In FIFO Stat for Port
130 #define MCS7840_DEV_REG_BO_FIFO_STAT4 0x39 /* Bulk-out FIFO Stat for Port
141 #define MCS7840_DEV_REG_ZERO_ENABLE 0x3e /* Enable/disable of zero out
144 * value for Bulk-Out for Port
147 * value for Bulk-Out and
148 * enable flag for Port 1, R/W */
150 * value for Bulk-Out for Port
153 * value for Bulk-Out and
154 * enable flag for Port 2, R/W */
156 * value for Bulk-Out for Port
159 * value for Bulk-Out and
160 * enable flag for Port 3, R/W */
162 * value for Bulk-Out for Port
165 * value for Bulk-Out and
166 * enable flag for Port 4, R/W */
169 #define MCS7840_DEV_SPx_LOOP_PIPES 0x01 /* Loop Bulk-Out FIFO to the
170 * Bulk-In FIFO, default = 0 */
174 #define MCS7840_DEV_SPx_RESET_OUT_FIFO 0x04 /* Reset Bulk-Out FIFO */
175 #define MCS7840_DEV_SPx_RESET_IN_FIFO 0x08 /* Reset Bulk-In FIFO */
199 #define MCS7840_DEV_CONTROLx_HWFC 0x01 /* Enable hardware flow
219 * RS-232/RS-485 mode,
230 * for Bulk-In FIFOs are swapped. One of buffers is used
240 * THIS ONE IS UNDOCUMENTED IN FULL DATASHEET, but e-mail from tech support
241 * confirms, that it is register for GPIO_0 and GPIO_1 data input/output.
243 * authors as "number of port" indicator, grounded (0) for two-port
244 * devices and pulled-up to 1 for 4-port devices.
255 * Default PLL input frequency Fin is 12Mhz (on-chip).
276 #define MCS7840_DEV_CLOCK_MUX_INEXTRN 0x01 /* External (device-depended)
280 #define MCS7840_DEV_CLOCK_MUX_PLLHIGH 0x04 /* 0 = PLL Output is
281 * 20MHz-100MHz (default), 1 =
282 * 100MHz-300MHz range */
283 #define MCS7840_DEV_CLOCK_MUX_INTRFIFOS 0x08 /* Enable additional 8 bytes
315 #define MCS7840_DEV_CLOCK_SELECT_PLL 0x04 /* PLL output (see for M and N
318 * (device-dependend) */
324 #define MCS7840_DEV_MODE_RESET 0x02 /* 0: RESET = Active High
329 #define MCS7840_DEV_MODE_PLLBYPASS 0x08 /* 1: PLL output is bypassed,
331 #define MCS7840_DEV_MODE_PORBYPASS 0x10 /* 1: Power-On Reset is
334 * active, 1: 2 Serial Ports /
335 * IrDA active */
375 #define MCS7840_DEV_ZERO_PERIODx_DEF 20 /* Number of Bulk-in requests
376 * befor sending zero-sized
380 #define MCS7840_DEV_ZERO_ENABLE_PORT1 0x01 /* Enable of sending
381 * zero-sized replies for port
383 #define MCS7840_DEV_ZERO_ENABLE_PORT2 0x02 /* Enable of sending
384 * zero-sized replies for port
386 #define MCS7840_DEV_ZERO_ENABLE_PORT3 0x04 /* Enable of sending
387 * zero-sized replies for port
389 #define MCS7840_DEV_ZERO_ENABLE_PORT4 0x08 /* Enable of sending
390 * zero-sized replies for port
397 #define MCS7840_DEV_THR_VAL_HIGH_ENABLE 0x80 /* Enable threshold */
432 #define MCS7840_DEV_DCR0_GPIO_MODE_IN 0x00 /* GPIO Mode - Input
435 #define MCS7840_DEV_DCR0_GPIO_MODE_OUT 0x08 /* GPIO Mode - Input
438 #define MCS7840_DEV_DCR0_RTS_ACTIVE_HIGH 0x10 /* RTS Active is HIGH,
451 #define MCS7840_DEV_DCR1_GPIO_CURRENT_6MA 0x00 /* GPIO output current
454 #define MCS7840_DEV_DCR1_GPIO_CURRENT_8MA 0x01 /* GPIO output current
457 #define MCS7840_DEV_DCR1_GPIO_CURRENT_10MA 0x02 /* GPIO output current
460 #define MCS7840_DEV_DCR1_GPIO_CURRENT_12MA 0x03 /* GPIO output current
465 #define MCS7840_DEV_DCR1_UART_CURRENT_6MA 0x00 /* UART output current
467 #define MCS7840_DEV_DCR1_UART_CURRENT_8MA 0x04 /* UART output current
469 #define MCS7840_DEV_DCR1_UART_CURRENT_10MA 0x08 /* UART output current
471 #define MCS7840_DEV_DCR1_UART_CURRENT_12MA 0x0c /* UART output current
478 #define MCS7840_DEV_DCR1_LONG_INTERRUPT 0x40 /* Enable 13 bytes of
486 * Wakeup will work only if DCR0_IRDA = 0 (RS-xxx mode) and
503 #define MCS7840_DEV_DCR2_SHDN_POLARITY 0x80 /* 0: Pin 12 Active Low, 1:
504 * Pin 12 Active High, default
510 * Thesse can be calculated as "1 << portnumber" for Bulk-out and
511 * "1 << (portnumber+1)" for Bulk-in
527 #define MCS7840_UART_REG_IER 0x01 /* Interrupt enable register -
529 #define MCS7840_UART_REG_FCR 0x02 /* FIFO Control register -
549 #define MCS7840_UART_IER_SLEEP 0x10 /* SLEEP enable */
552 #define MCS7840_UART_FCR_ENABLE 0x01 /* Enable FIFO */
581 #define MCS7840_UART_LCR_STOPB2 0x04 /* 1.5-2 stop bits depends on
585 #define MCS7840_UART_LCR_PARITYON 0x08 /* Parity ON/OFF - ON */
606 #define MCS7840_UART_MCR_DTR 0x01 /* Force DTR to be active
608 #define MCS7840_UART_MCR_RTS 0x02 /* Force RTS to be active
610 #define MCS7840_UART_MCR_IE 0x04 /* Enable interrupts (from
612 #define MCS7840_UART_MCR_LOOPBACK 0x10 /* Enable local loopback test
614 #define MCS7840_UART_MCR_CTSRTS 0x20 /* Enable CTS/RTS flow control
616 #define MCS7840_UART_MCR_DTRDSR 0x40 /* Enable DTR/DSR flow control
618 #define MCS7840_UART_MCR_DCD 0x80 /* Enable DCD flow control in
636 #define MCS7840_UART_SCRATCHPAD_RS232 0x00 /* RS-485 disabled */
637 #define MCS7840_UART_SCRATCHPAD_RS485_DTRRX 0x80 /* RS-485 mode, DTR High
639 #define MCS7840_UART_SCRATCHPAD_RS485_DTRTX 0xc0 /* RS-485 mode, DTR High