Lines Matching +full:modem +full:- +full:control +full:- +full:line +full:- +full:ports

1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
48 #define MCS7840_DEV_REG_CONTROL1 0x01 /* Control bits for UART 1,
50 #define MCS7840_DEV_REG_PINPONGHIGH 0x02 /* High bits of ping-pong
52 #define MCS7840_DEV_REG_PINPONGLOW 0x03 /* Low bits of ping-pong
59 #define MCS7840_DEV_REG_CONTROL2 0x09 /* Control bits for UART 2,
62 #define MCS7840_DEV_REG_CONTROL3 0x0b /* Control bits for UART 3,
65 #define MCS7840_DEV_REG_CONTROL4 0x0d /* Control bits for UART 4,
67 #define MCS7840_DEV_REG_PLL_DIV_M 0x0e /* Pre-diviedr for PLL, R/W */
71 * endpoint control, R/W */
73 #define MCS7840_DEV_REG_CLOCK_SELECT12 0x13 /* Clock source for ports 1 &
75 #define MCS7840_DEV_REG_CLOCK_SELECT34 0x14 /* Clock source for ports 3 &
78 /* DCRx_2-DCRx_4 Registers goes here (see below, they are documented) */
105 #define MCS7840_DEV_REG_RX_SAMPLING12 0x30 /* RX sampling for ports 1 &
107 #define MCS7840_DEV_REG_RX_SAMPLING34 0x31 /* RX sampling for ports 3 &
109 #define MCS7840_DEV_REG_BI_FIFO_STAT1 0x32 /* Bulk-In FIFO Stat for Port
112 #define MCS7840_DEV_REG_BO_FIFO_STAT1 0x33 /* Bulk-out FIFO Stat for Port
115 #define MCS7840_DEV_REG_BI_FIFO_STAT2 0x34 /* Bulk-In FIFO Stat for Port
118 #define MCS7840_DEV_REG_BO_FIFO_STAT2 0x35 /* Bulk-out FIFO Stat for Port
121 #define MCS7840_DEV_REG_BI_FIFO_STAT3 0x36 /* Bulk-In FIFO Stat for Port
124 #define MCS7840_DEV_REG_BO_FIFO_STAT3 0x37 /* Bulk-out FIFO Stat for Port
127 #define MCS7840_DEV_REG_BI_FIFO_STAT4 0x38 /* Bulk-In FIFO Stat for Port
130 #define MCS7840_DEV_REG_BO_FIFO_STAT4 0x39 /* Bulk-out FIFO Stat for Port
144 * value for Bulk-Out for Port
147 * value for Bulk-Out and
150 * value for Bulk-Out for Port
153 * value for Bulk-Out and
156 * value for Bulk-Out for Port
159 * value for Bulk-Out and
162 * value for Bulk-Out for Port
165 * value for Bulk-Out and
169 #define MCS7840_DEV_SPx_LOOP_PIPES 0x01 /* Loop Bulk-Out FIFO to the
170 * Bulk-In FIFO, default = 0 */
174 #define MCS7840_DEV_SPx_RESET_OUT_FIFO 0x04 /* Reset Bulk-Out FIFO */
175 #define MCS7840_DEV_SPx_RESET_IN_FIFO 0x08 /* Reset Bulk-In FIFO */
200 * control (when power
208 #define MCS7840_DEV_CONTROLx_UNUSED2 0x08 /* Reserved for ports
219 * RS-232/RS-485 mode,
229 * These registers control how often two input buffers
230 * for Bulk-In FIFOs are swapped. One of buffers is used
240 * THIS ONE IS UNDOCUMENTED IN FULL DATASHEET, but e-mail from tech support
243 * authors as "number of port" indicator, grounded (0) for two-port
244 * devices and pulled-up to 1 for 4-port devices.
246 #define MCS7840_DEV_GPIO_4PORTS 0x01 /* Device has 4 ports
255 * Default PLL input frequency Fin is 12Mhz (on-chip).
276 #define MCS7840_DEV_CLOCK_MUX_INEXTRN 0x01 /* External (device-depended)
281 * 20MHz-100MHz (default), 1 =
282 * 100MHz-300MHz range */
311 * ports */
318 * (device-dependend) */
331 #define MCS7840_DEV_MODE_PORBYPASS 0x10 /* 1: Power-On Reset is
333 #define MCS7840_DEV_MODE_SELECT24S 0x20 /* 0: 4 Serial Ports / IrDA
334 * active, 1: 2 Serial Ports /
349 * These registers control when bit value will be sampled within
375 #define MCS7840_DEV_ZERO_PERIODx_DEF 20 /* Number of Bulk-in requests
376 * befor sending zero-sized
381 * zero-sized replies for port
384 * zero-sized replies for port
387 * zero-sized replies for port
390 * zero-sized replies for port
432 #define MCS7840_DEV_DCR0_GPIO_MODE_IN 0x00 /* GPIO Mode - Input
435 #define MCS7840_DEV_DCR0_GPIO_MODE_OUT 0x08 /* GPIO Mode - Input
486 * Wakeup will work only if DCR0_IRDA = 0 (RS-xxx mode) and
510 * Thesse can be calculated as "1 << portnumber" for Bulk-out and
511 * "1 << (portnumber+1)" for Bulk-in
527 #define MCS7840_UART_REG_IER 0x01 /* Interrupt enable register -
529 #define MCS7840_UART_REG_FCR 0x02 /* FIFO Control register -
533 #define MCS7840_UART_REG_LCR 0x03 /* Line control register R/W */
534 #define MCS7840_UART_REG_MCR 0x04 /* Modem control register R/W */
535 #define MCS7840_UART_REG_LSR 0x05 /* Line status register R/Only */
536 #define MCS7840_UART_REG_MSR 0x06 /* Modem status register
547 #define MCS7840_UART_IER_MODEM 0x08 /* Modem status change
570 #define MCS7840_UART_ISR_MSCHANGE 0x00 /* Modem status change */
581 #define MCS7840_UART_LCR_STOPB2 0x04 /* 1.5-2 stop bits depends on
585 #define MCS7840_UART_LCR_PARITYON 0x08 /* Parity ON/OFF - ON */
614 #define MCS7840_UART_MCR_CTSRTS 0x20 /* Enable CTS/RTS flow control
616 #define MCS7840_UART_MCR_DTRDSR 0x40 /* Enable DTR/DSR flow control
618 #define MCS7840_UART_MCR_DCD 0x80 /* Enable DCD flow control in
636 #define MCS7840_UART_SCRATCHPAD_RS232 0x00 /* RS-485 disabled */
637 #define MCS7840_UART_SCRATCHPAD_RS485_DTRRX 0x80 /* RS-485 mode, DTR High
639 #define MCS7840_UART_SCRATCHPAD_RS485_DTRTX 0xc0 /* RS-485 mode, DTR High