Lines Matching refs:uint8_t

54 typedef uint8_t (dwc_otg_cmd_t)(struct dwc_otg_softc *sc, struct dwc_otg_td *td);
67 	uint8_t max_packet_count;	/* packet_count */
68 	uint8_t errcnt;
69 	uint8_t tmr_res;
70 	uint8_t tmr_val;
71 	uint8_t	ep_no;
72 	uint8_t ep_type;
73 	uint8_t channel[3];
74 	uint8_t tt_index;		/* TT data */
75 	uint8_t tt_start_slot;		/* TT data */
76 	uint8_t tt_complete_slot;	/* TT data */
77 	uint8_t tt_xactpos;		/* TT data */
78 	uint8_t state;
85 	uint8_t	error_any:1;
86 	uint8_t	error_stall:1;
87 	uint8_t	alt_next:1;
88 	uint8_t	short_pkt:1;
89 	uint8_t	did_stall:1;
90 	uint8_t toggle:1;
91 	uint8_t set_toggle:1;
92 	uint8_t got_short:1;
93 	uint8_t tt_scheduled:1;
94 	uint8_t did_nak:1;
98 	uint8_t slot_index;
109 	uint8_t	short_pkt;
115 	uint8_t	setup_alt_next;
116 	uint8_t did_stall;
117 	uint8_t bulk_or_control;
132 	uint8_t	change_connect:1;
133 	uint8_t	change_suspend:1;
134 	uint8_t change_reset:1;
135 	uint8_t change_enabled:1;
136 	uint8_t change_over_current:1;
137 	uint8_t	status_suspend:1;	/* set if suspended */
138 	uint8_t	status_vbus:1;		/* set if present */
139 	uint8_t	status_bus_reset:1;	/* set if reset complete */
140 	uint8_t	status_high_speed:1;	/* set if High Speed is selected */
141 	uint8_t	status_low_speed:1;	/* set if Low Speed is selected */
142 	uint8_t status_device_mode:1;	/* set if device mode */
143 	uint8_t	self_powered:1;
144 	uint8_t	clocks_off:1;
145 	uint8_t	port_powered:1;
146 	uint8_t	port_enabled:1;
147 	uint8_t port_over_current:1;
148 	uint8_t	d_pulled_up:1;
195 	uint8_t sc_phy_type;
196 	uint8_t sc_phy_bits;
202 	uint8_t sc_timer_active;
203 	uint8_t	sc_dev_ep_max;
204 	uint8_t sc_dev_in_ep_max;
205 	uint8_t	sc_host_ch_max;
206 	uint8_t sc_needsof;
207 	uint8_t	sc_rt_addr;		/* root HUB address */
208 	uint8_t	sc_conf;		/* root HUB config */
209 	uint8_t sc_mode;		/* mode of operation */
214 	uint8_t	sc_hub_idata[1];