Lines Matching +full:reset +full:- +full:synchronized
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (C) 2008-2009 Semihalf, Piotr Ziecik
5 * Copyright (C) 2006-2007 Semihalf, Piotr Kruszynski
58 #define TSEC_REG_OSTBD 0x2b0 /* Out-of-sequence TxBD register */
59 #define TSEC_REG_OSTBDP 0x2b4 /* Out-of-sequence Tx data buffer pointer
76 #define TSEC_REG_IPGIFG 0x508 /* Inter-packet gap/inter-frame gap
78 #define TSEC_REG_HAFDUP 0x50c /* Half-duplex register */
92 #define TSEC_REG_MON_TR64 0x680 /* Transmit and receive 64-byte
94 #define TSEC_REG_MON_TR127 0x684 /* Transmit and receive 65-127 byte
96 #define TSEC_REG_MON_TR255 0x688 /* Transmit and receive 128-255 byte
98 #define TSEC_REG_MON_TR511 0x68c /* Transmit and receive 256-511 byte
100 #define TSEC_REG_MON_TR1K 0x690 /* Transmit and receive 512-1023 byte
102 #define TSEC_REG_MON_TRMAX 0x694 /* Transmit and receive 1024-1518 byte
104 #define TSEC_REG_MON_TRMGV 0x698 /* Transmit and receive 1519-1522 byte
219 #define TSEC_RCRTL_PRSFM 0x00000020 /* FIFO-mode parsing */
281 #define TSEC_MACCFG1_SOFT_RESET 0x80000000 /* Soft reset */
282 #define TSEC_MACCFG1_RESET_RX_MC 0x00080000 /* Reset receive MAC control block */
283 #define TSEC_MACCFG1_RESET_TX_MC 0x00040000 /* Reset transmit MAC control block */
284 #define TSEC_MACCFG1_RESET_RX_FUN 0x00020000 /* Reset receive function block */
285 #define TSEC_MACCFG1_RESET_TX_FUN 0x00010000 /* Reset transmit function block */
289 #define TSEC_MACCFG1_SYNCD_RX_EN 0x00000008 /* Receive enable synchronized
290 * to the receive stream (Read-only) */
292 #define TSEC_MACCFG1_SYNCD_TX_EN 0x00000002 /* Transmit enable synchronized
293 * to the transmit stream (Read-only) */
309 #define TSEC_ECNTRL_TBIM 0x00000020 /* Ten-bit I/F mode */
311 #define TSEC_ECNTRL_RMM 0x00000004 /* Reduced-pin mode */
314 #define TSEC_MIIMCFG_RESETMGMT 0x80000000 /* Reset management */
354 #define TSEC_RXBD_M 0x0100 /* Miss - The frame was received because
358 #define TSEC_RXBD_LG 0x0020 /* Large - Rx frame length violation */
359 #define TSEC_RXBD_NO 0x0010 /* Rx non-octet aligned frame */
371 /* Transmit Path Off-Load Frame Control Block flags */
379 #define TSEC_TX_FCB_FLAG_NO_PH_CSUM 0x0100 /* Disable pseudo-header checksum */
382 /* Receive Path Off-Load Frame Control Block flags */