Lines Matching +full:negative +full:- +full:phase
1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
5 * PCI-SCSI controllers.
7 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
9 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
14 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
15 * Copyright (C) 1998-1999 Gerard Roudier
18 * a port of the FreeBSD ncr driver to Linux-1.2.13.
22 * Stefan Esser <se@mi.Uni-Koeln.de>
26 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
34 *-----------------------------------------------------------------------------
62 * Scripts for SYMBIOS-Processor
72 * Script fragments which are loaded into the on-chip RAM
152 * except for chips that support 8K on-chip RAM.
215 /*--------------------------< START >----------------------------*/ {
262 }/*-------------------------< GETJOB_BEGIN >---------------------*/,{
267 }/*-------------------------< GETJOB_END >-----------------------*/,{
272 }/*-------------------------< SELECT >---------------------------*/,{
305 * the next instruction that checks SCSI phase.
307 * complete or selection time-out to occur.
324 }/*-------------------------< WF_SEL_DONE >----------------------*/,{
327 }/*-------------------------< SEL_DONE >-------------------------*/,{
329 * C1010-33 errata work-around.
332 * We reload it once phase is stable.
337 }/*-------------------------< SEND_IDENT >-----------------------*/,{
345 }/*-------------------------< SELECT2 >--------------------------*/,{
359 * Anticipate the COMMAND phase.
360 * This is the PHASE we expect at this point.
364 }/*-------------------------< COMMAND >--------------------------*/,{
370 }/*-------------------------< DISPATCH >-------------------------*/,{
372 * MSG_IN is the only phase that shall be
397 -16,
403 -16,
408 }/*-------------------------< SEL_NO_CMD >-----------------------*/,{
411 * phase after IDENTIFY has been sent.
413 * If it stays in MSG OUT phase send it
419 * If target does not switch to MSG IN phase
434 }/*-------------------------< INIT >-----------------------------*/,{
444 -16,
447 }/*-------------------------< CLRACK >---------------------------*/,{
449 * Terminate possible pending message phase.
455 }/*-------------------------< DISP_STATUS >----------------------*/,{
457 * Anticipate STATUS phase.
466 }/*-------------------------< DATAI_DONE >-----------------------*/,{
475 * We anticipate a STATUS phase.
490 * overrun condition. Check against MSG_IN phase.
497 * We are in MSG_IN phase,
521 }/*-------------------------< DATAO_DONE >-----------------------*/,{
530 * We anticipate a STATUS phase.
549 }/*-------------------------< DATAI_PHASE >----------------------*/,{
552 }/*-------------------------< DATAO_PHASE >----------------------*/,{
554 * C1010-66 errata work-around.
556 * in DATA OUT phase on 33 MHz PCI BUS.
563 }/*-------------------------< MSG_IN >---------------------------*/,{
572 }/*-------------------------< MSG_IN2 >--------------------------*/,{
587 * C code, so no need to waste on-chip RAM
592 }/*-------------------------< STATUS >---------------------------*/,{
618 * Anticipate the MESSAGE PHASE for
625 }/*-------------------------< COMPLETE >-------------------------*/,{
652 }/*-------------------------< COMPLETE2 >------------------------*/,{
678 * If we performed an auto-sense, call
686 }/*-------------------------< COMPLETE_ERROR >-------------------*/,{
691 }/*-------------------------< DONE >-----------------------------*/,{
720 }/*-------------------------< DONE_END >-------------------------*/,{
723 }/*-------------------------< SAVE_DP >--------------------------*/,{
746 }/*-------------------------< RESTORE_DP >-----------------------*/,{
755 }/*-------------------------< DISCONNECT >-----------------------*/,{
800 }/*-------------------------< IDLE >-----------------------------*/,{
813 }/*-------------------------< UNGETJOB >-------------------------*/,{
833 }/*-------------------------< RESELECT >-------------------------*/,{
844 }/*-------------------------< RESELECTED >-----------------------*/,{
873 * We expect MESSAGE IN phase.
885 }/*-------------------------< RESEL_SCNTL4 >---------------------*/,{
925 }/*-------------------------< RESEL_LUN0 >-----------------------*/,{
939 }/*-------------------------< RESEL_TAG >------------------------*/,{
995 }/*-------------------------< RESEL_DSA >------------------------*/,{
1001 }/*-------------------------< RESEL_DSA1 >-----------------------*/,{
1018 }/*-------------------------< RESEL_NO_TAG >---------------------*/,{
1032 }/*-------------------------< DATA_IN >--------------------------*/,{
1044 }/*-------------------------< DATA_IN2 >-------------------------*/,{
1049 }/*-------------------------< DATA_OUT >-------------------------*/,{
1061 }/*-------------------------< DATA_OUT2 >------------------------*/,{
1066 }/*-------------------------< PM0_DATA >-------------------------*/,{
1074 * Check against actual DATA PHASE.
1079 * Actual phase is DATA IN.
1086 * PM0 DATA mini-script.
1097 }/*-------------------------< PM0_DATA_OUT >---------------------*/,{
1099 * Actual phase is DATA OUT.
1106 * PM0 DATA mini-script.
1115 }/*-------------------------< PM0_DATA_END >---------------------*/,{
1118 * data from the PM0 DATA mini-script.
1131 }/*-------------------------< PM1_DATA >-------------------------*/,{
1139 * Check against actual DATA PHASE.
1144 * Actual phase is DATA IN.
1151 * PM1 DATA mini-script.
1162 }/*-------------------------< PM1_DATA_OUT >---------------------*/,{
1164 * Actual phase is DATA OUT.
1171 * PM1 DATA mini-script.
1180 }/*-------------------------< PM1_DATA_END >---------------------*/,{
1183 * data from the PM1 DATA mini-script.
1196 }/*-------------------------<>-----------------------------------*/
1200 /*--------------------------< START64 >--------------------------*/ {
1208 }/*-------------------------< NO_DATA >--------------------------*/,{
1211 }/*-------------------------< SEL_FOR_ABORT >--------------------*/,{
1235 -8,
1260 }/*-------------------------< SEL_FOR_ABORT_1 >------------------*/,{
1266 }/*-------------------------< MSG_IN_ETC >-----------------------*/,{
1291 }/*-------------------------< MSG_RECEIVED >---------------------*/,{
1296 }/*-------------------------< MSG_WEIRD_SEEN >-------------------*/,{
1301 }/*-------------------------< MSG_EXTENDED >---------------------*/,{
1318 SCR_REG_REG (sfbr, SCR_ADD, (256-8)),
1335 }/*-------------------------< MSG_BAD >--------------------------*/,{
1337 * unimplemented message - reject it.
1345 }/*-------------------------< MSG_WEIRD >------------------------*/,{
1354 }/*-------------------------< MSG_WEIRD1 >-----------------------*/,{
1363 }/*-------------------------< WDTR_RESP >------------------------*/,{
1373 }/*-------------------------< SEND_WDTR >------------------------*/,{
1381 }/*-------------------------< SDTR_RESP >------------------------*/,{
1391 }/*-------------------------< SEND_SDTR >------------------------*/,{
1399 }/*-------------------------< PPR_RESP >-------------------------*/,{
1409 }/*-------------------------< SEND_PPR >-------------------------*/,{
1417 }/*-------------------------< NEGO_BAD_PHASE >-------------------*/,{
1422 }/*-------------------------< MSG_OUT >--------------------------*/,{
1431 * ... wait for the next phase
1436 }/*-------------------------< MSG_OUT_DONE >---------------------*/,{
1444 * ... and process the next phase
1448 }/*-------------------------< DATA_OVRUN >-----------------------*/,{
1454 }/*-------------------------< DATA_OVRUN1 >----------------------*/,{
1458 * If phase is DATA OUT write 1 byte and count it.
1479 * Finally check against DATA IN phase.
1492 }/*-------------------------< DATA_OVRUN2 >----------------------*/,{
1495 * This will allow to return a negative
1509 }/*-------------------------< ABORT_RESEL >----------------------*/,{
1530 }/*-------------------------< RESEND_IDENT >---------------------*/,{
1532 * The target stays in MSG OUT phase after having acked
1541 }/*-------------------------< IDENT_BREAK >----------------------*/,{
1546 }/*-------------------------< IDENT_BREAK_ATN >------------------*/,{
1551 }/*-------------------------< SDATA_IN >-------------------------*/,{
1558 }/*-------------------------< RESEL_BAD_LUN >--------------------*/,{
1568 }/*-------------------------< BAD_I_T_L >------------------------*/,{
1578 }/*-------------------------< BAD_I_T_L_Q >----------------------*/,{
1588 }/*-------------------------< BAD_STATUS >-----------------------*/,{
1601 }/*-------------------------< PM_HANDLE >------------------------*/,{
1603 * Phase mismatch handling.
1608 * SAVE mini-script and a DATA phase mini-script.
1632 * If we have been interrupt in a PM DATA mini-script,
1650 }/*-------------------------< PM_HANDLE1 >-----------------------*/,{
1660 }/*-------------------------< PM_SAVE >--------------------------*/,{
1663 * interrupted in a PM DATA mini-script and/or
1673 }/*-------------------------< PM0_SAVE >-------------------------*/,{
1694 * Set the current pointer at the PM0 DATA mini-script.
1700 }/*-------------------------< PM1_SAVE >-------------------------*/,{
1721 * Set the current pointer at the PM1 DATA mini-script.
1727 }/*-------------------------< PM_WSR_HANDLE >--------------------*/,{
1729 * Phase mismatch handling from SCRIPT with WSR set.
1732 * set and the target changes PHASE.
1755 * - size to transfer = 1 byte.
1756 * - bit 24..31 = high address bit [32...39].
1772 * Wait for a valid phase.
1774 * sometimes raised a spurious phase mismatch with
1776 * Waiting explicitly for the PHASE seemed to avoid
1777 * the nested phase mismatch. Btw, this didn't happen
1788 * We can now handle the phase mismatch with UA fixed.
1819 }/*-------------------------< WSR_MA_HELPER >--------------------*/,{
1828 }/*-------------------------< ZERO >-----------------------------*/,{
1830 }/*-------------------------< SCRATCH >--------------------------*/,{
1832 }/*-------------------------< PM0_DATA_ADDR >--------------------*/,{
1834 }/*-------------------------< PM1_DATA_ADDR >--------------------*/,{
1836 }/*-------------------------< SAVED_DSA >------------------------*/,{
1838 }/*-------------------------< SAVED_DRS >------------------------*/,{
1840 }/*-------------------------< DONE_POS >-------------------------*/,{
1842 }/*-------------------------< STARTPOS >-------------------------*/,{
1844 }/*-------------------------< TARGTBL >--------------------------*/,{
1847 }/*-------------------------< SNOOPTEST >------------------------*/,{
1863 }/*-------------------------< SNOOPEND >-------------------------*/,{
1869 }/*-------------------------<>-----------------------------------*/