Lines Matching +full:16 +full:- +full:bit
3 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
46 * D-Link Systems PCI vendor ID
64 * D-Link Systems device ID
77 * Note that while DMA addresses are all in 64-bit fields, only
90 bus_write_4((_sc)->sc_res[0], (reg), (val))
92 bus_write_2((_sc)->sc_res[0], (reg), (val))
94 bus_write_1((_sc)->sc_res[0], (reg), (val))
97 bus_read_4((_sc)->sc_res[0], (reg))
99 bus_read_2((_sc)->sc_res[0], (reg))
101 bus_read_1((_sc)->sc_res[0], (reg))
104 bus_barrier((_sc)->sc_res[0], reg, length, flags)
132 #define TFD_WordAlign(x) ((x) << 16)
203 #define DMAC_RxEarlyDisable (1U << 16)
216 #define STGE_TxDMABurstThresh 0x18 /* 8-bit */
218 #define STGE_TxDMAUrgentThresh 0x19 /* 8-bit */
220 #define STGE_TxDMAPollPeriod 0x1a /* 8-bit, 320ns increments */
226 #define STGE_RxDMABurstThresh 0x24 /* 8-bit */
228 #define STGE_RxDMAUrgentThresh 0x25 /* 8-bit */
230 #define STGE_RxDMAPollPeriod 0x26 /* 8-bit, 320ns increments */
235 #define RDIC_RxDMAWaitTime(x) ((x) << 16)
252 #define STGE_DebugCtrl 0x2c /* 16-bit */
271 #define AC_GlobalReset (1U << 16)
285 #define STGE_FIFOCtrl 0x38 /* 16-bit */
290 #define STGE_RxEarlyThresh 0x3a /* 16-bit */
292 #define STGE_FlowOffThresh 0x3c /* 16-bit */
294 #define STGE_FlowOnTresh 0x3e /* 16-bit */
296 #define STGE_TxStartThresh 0x44 /* 16-bit */
298 #define STGE_EepromData 0x48 /* 16-bit */
300 #define STGE_EepromCtrl 0x4a /* 16-bit */
311 #define STGE_ExpRomData 0x50 /* 8-bit */
313 #define STGE_WakeEvent 0x51 /* 8-bit */
329 #define STGE_IntStatusAck 0x5a /* 16-bit */
331 #define STGE_IntEnable 0x5c /* 16-bit */
333 #define STGE_IntStatus 0x5e /* 16-bit */
356 #define TS_TxFrameId_get(x) ((x) >> 16)
374 #define MC_CollisionDetect (1U << 16)
390 #define STGE_PhySet 0x75 /* 8-bit */
395 #define STGE_PhyCtrl 0x76 /* 8-bit */
398 #define PC_MgmtDir (1U << 2) /* MAC->PHY */
408 #define STGE_StationAddress0 0x78 /* 16-bit */
410 #define STGE_StationAddress1 0x7a /* 16-bit */
412 #define STGE_StationAddress2 0x7c /* 16-bit */
414 #define STGE_VLANHashTable 0x7e /* 16-bit */
420 #define STGE_ReceiveMode 0x88 /* 16-bit */
438 #define STGE_RxJumboFrames 0xbc /* 16-bit */
440 #define STGE_TCPCheckSumErrors 0xc0 /* 16-bit */
442 #define STGE_IPCheckSumErrors 0xc2 /* 16-bit */
444 #define STGE_UDPCheckSumErrors 0xc4 /* 16-bit */
446 #define STGE_TxJumboFrames 0xf4 /* 16-bit */
462 #define STGE_BcstFramesRcvdOk 0xbe /* 16-bit */
464 #define STGE_MacControlFramesRcvd 0xc6 /* 16-bit */
466 #define STGE_FrameTooLongErrors 0xc8 /* 16-bit */
468 #define STGE_InRangeLengthErrors 0xca /* 16-bit */
470 #define STGE_FramesCheckSeqErrors 0xcc /* 16-bit */
472 #define STGE_FramesLostRxErrors 0xce /* 16-bit */
492 #define STGE_BcstFramesXmtdOk 0xf6 /* 16-bit */
494 #define STGE_CarrierSenseErrors 0xf8 /* 16-bit */
496 #define STGE_MacControlFramesXmtd 0xfa /* 16-bit */
498 #define STGE_FramesAbortXSColls 0xfc /* 16-bit */
500 #define STGE_FramesWEXDeferal 0xfe /* 16-bit */
503 * RMON-compatible statistics. Only accessible if memory-mapped.
553 #define STGE_TX_HIWAT (STGE_TX_RING_CNT - STGE_TX_LOWAT)
564 (STGE_JUMBO_FRAMELEN - ETHER_HDR_LEN - ETHER_CRC_LEN)
618 ((sc)->sc_rdata.stge_tx_ring_paddr + sizeof(struct stge_tfd) * (i))
620 ((sc)->sc_rdata.stge_rx_ring_paddr + sizeof(struct stge_rfd) * (i))
667 #define STGE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
668 #define STGE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
669 #define STGE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
670 #define STGE_MII_LOCK(_sc) mtx_lock(&(_sc)->sc_mii_mtx)
671 #define STGE_MII_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mii_mtx)
677 (_sc)->sc_cdata.stge_rxhead = NULL; \
678 (_sc)->sc_cdata.stge_rxtail = NULL; \
679 (_sc)->sc_cdata.stge_rxlen = 0; \