Lines Matching +full:adc +full:- +full:dev
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 * Maestro-3/Allegro FreeBSD pcm sound driver
34 * (+) /dev/dsp multiple concurrent play channels.
35 * (+) /dev/dsp config (speed, mono/stereo, 8/16 bit).
36 * (+) /dev/mixer sets left/right volumes.
37 * (+) /dev/dsp recording works. Tested successfully with the cdrom channel
39 * (-) hardware volme controls don't work =-(
40 * (-) setblocksize() does nothing.
50 * Taku YAMAMOTO for his Maestro-1/2 FreeBSD driver and sanity reference.
51 * <taku@cent.saitama-u.ac.jp>
61 #include <dev/sound/pcm/sound.h>
62 #include <dev/sound/pcm/ac97.h>
64 #include <dev/pci/pcireg.h>
65 #include <dev/pci/pcivar.h>
69 #include <dev/sound/pci/allegro_reg.h>
70 #include <dev/sound/pci/allegro_code.h>
72 /* -------------------------------------------------------------------- */
74 enum {CHANGE=0, CALL=1, INTR=2, BORING=3, NONE=-1};
80 /* -------------------------------------------------------------------- */
89 { 0x1988125d, ESS_ALLEGRO_1, 50, 800, "ESS Technology Allegro-1" },
98 #define M3_PCHANS 4 /* create /dev/dsp0.[0-N] to use more than one */
100 #define M3_MAXADDR ((1 << 27) - 1)
134 device_t dev; member
162 #define M3_LOCK(_sc) snd_mtxlock((_sc)->sc_lock)
163 #define M3_UNLOCK(_sc) snd_mtxunlock((_sc)->sc_lock)
164 #define M3_LOCK_ASSERT(_sc) snd_mtxassert((_sc)->sc_lock)
166 /* -------------------------------------------------------------------- */
194 /* talk to the codec - called from ac97.c */
210 /* -------------------------------------------------------------------- */
220 /* -------------------------------------------------------------------- */
267 /* -------------------------------------------------------------------- */
270 #define m3_rd_1(sc, regno) bus_space_read_1(sc->st, sc->sh, regno)
271 #define m3_rd_2(sc, regno) bus_space_read_2(sc->st, sc->sh, regno)
272 #define m3_rd_4(sc, regno) bus_space_read_4(sc->st, sc->sh, regno)
273 #define m3_wr_1(sc, regno, data) bus_space_write_1(sc->st, sc->sh, regno, data)
274 #define m3_wr_2(sc, regno, data) bus_space_write_2(sc->st, sc->sh, regno, data)
275 #define m3_wr_4(sc, regno, data) bus_space_write_4(sc->st, sc->sh, regno, data)
313 return -1; in m3_wait()
316 /* -------------------------------------------------------------------- */
327 /* init ac-link */ in m3_initcd()
340 device_printf(sc->dev, "m3_rdcd timed out.\n"); in m3_rdcd()
341 return -1; in m3_rdcd()
346 device_printf(sc->dev, "m3_rdcd timed out.\n"); in m3_rdcd()
347 return -1; in m3_rdcd()
358 device_printf(sc->dev, "m3_wrcd timed out.\n"); in m3_wrcd()
359 return -1; in m3_wrcd()
367 /* -------------------------------------------------------------------- */
402 {SRC3_DIRECTION_OFFSET + 18, MINISRC_BIQUAD_STAGE - 1}, in m3_pchan_init()
408 idx = sc->pch_cnt; /* dac instance number, no active reuse! */ in m3_pchan_init()
413 device_printf(sc->dev, "m3_pchan_init not PCMDIR_PLAY\n"); in m3_pchan_init()
422 dsp_in_size = MINISRC_IN_BUFFER_SIZE - (0x20 * 2); in m3_pchan_init()
423 dsp_out_size = MINISRC_OUT_BUFFER_SIZE - (0x20 * 2); in m3_pchan_init()
427 ch = &sc->pch[idx]; in m3_pchan_init()
428 ch->dac_idx = idx; in m3_pchan_init()
429 ch->dac_data = dac_data; in m3_pchan_init()
430 if (ch->dac_data + data_bytes/2 >= 0x1c00) { in m3_pchan_init()
432 device_printf(sc->dev, "m3_pchan_init: revb mem exhausted\n"); in m3_pchan_init()
436 ch->buffer = b; in m3_pchan_init()
437 ch->parent = sc; in m3_pchan_init()
438 ch->channel = c; in m3_pchan_init()
439 ch->fmt = SND_FORMAT(AFMT_U8, 1, 0); in m3_pchan_init()
440 ch->spd = DSP_DEFAULT_SPEED; in m3_pchan_init()
442 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, 0, sc->bufsz) != 0) { in m3_pchan_init()
443 device_printf(sc->dev, "m3_pchan_init chn_allocbuf failed\n"); in m3_pchan_init()
447 ch->bufsize = sndbuf_getsize(ch->buffer); in m3_pchan_init()
450 bus_addr = sndbuf_getbufaddr(ch->buffer); in m3_pchan_init()
452 device_printf(sc->dev, "m3_pchan_init unaligned bus_addr\n"); in m3_pchan_init()
455 m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_ADDRL, LO(bus_addr)); in m3_pchan_init()
456 m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_ADDRH, HI(bus_addr)); in m3_pchan_init()
457 m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_END_PLUS_1L, in m3_pchan_init()
458 LO(bus_addr + ch->bufsize)); in m3_pchan_init()
459 m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_END_PLUS_1H, in m3_pchan_init()
460 HI(bus_addr + ch->bufsize)); in m3_pchan_init()
461 m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_CURRENTL, in m3_pchan_init()
463 m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_CURRENTH, in m3_pchan_init()
467 m3_wr_assp_data(sc, ch->dac_data + CDATA_IN_BUF_BEGIN, dsp_in_buf); in m3_pchan_init()
468 m3_wr_assp_data(sc, ch->dac_data + CDATA_IN_BUF_END_PLUS_1, in m3_pchan_init()
470 m3_wr_assp_data(sc, ch->dac_data + CDATA_IN_BUF_HEAD, dsp_in_buf); in m3_pchan_init()
471 m3_wr_assp_data(sc, ch->dac_data + CDATA_IN_BUF_TAIL, dsp_in_buf); in m3_pchan_init()
472 m3_wr_assp_data(sc, ch->dac_data + CDATA_OUT_BUF_BEGIN, dsp_out_buf); in m3_pchan_init()
473 m3_wr_assp_data(sc, ch->dac_data + CDATA_OUT_BUF_END_PLUS_1, in m3_pchan_init()
475 m3_wr_assp_data(sc, ch->dac_data + CDATA_OUT_BUF_HEAD, dsp_out_buf); in m3_pchan_init()
476 m3_wr_assp_data(sc, ch->dac_data + CDATA_OUT_BUF_TAIL, dsp_out_buf); in m3_pchan_init()
479 m3_wr_assp_data(sc, ch->dac_data + SRC3_DIRECTION_OFFSET + 12, in m3_pchan_init()
480 ch->dac_data + 40 + 8); in m3_pchan_init()
481 m3_wr_assp_data(sc, ch->dac_data + SRC3_DIRECTION_OFFSET + 19, in m3_pchan_init()
484 m3_wr_assp_data(sc, ch->dac_data + SRC3_DIRECTION_OFFSET + 22, 0); in m3_pchan_init()
486 m3_wr_assp_data(sc, ch->dac_data + CDATA_DMA_CONTROL, in m3_pchan_init()
492 m3_wr_assp_data(sc, ch->dac_data + pv[i].addr, pv[i].val); in m3_pchan_init()
497 (sc->pch_cnt + sc->rch_cnt), in m3_pchan_init()
498 ch->dac_data >> DP_SHIFT_COUNT); in m3_pchan_init()
499 m3_wr_assp_data(sc, KDATA_DMA_XFER0 + (sc->pch_cnt + sc->rch_cnt), in m3_pchan_init()
500 ch->dac_data >> DP_SHIFT_COUNT); in m3_pchan_init()
501 m3_wr_assp_data(sc, KDATA_MIXER_XFER0 + sc->pch_cnt, in m3_pchan_init()
502 ch->dac_data >> DP_SHIFT_COUNT); in m3_pchan_init()
509 sc->pch_cnt++; in m3_pchan_init()
519 struct sc_info *sc = ch->parent; in m3_pchan_free()
522 M3_DEBUG(CHANGE, ("m3_pchan_free(dac=%d)\n", ch->dac_idx)); in m3_pchan_free()
529 (sc->pch_cnt - 1) + sc->rch_cnt, 0); in m3_pchan_free()
531 (sc->pch_cnt - 1) + sc->rch_cnt, 0); in m3_pchan_free()
532 m3_wr_assp_data(sc, KDATA_MIXER_XFER0 + (sc->pch_cnt-1), 0); in m3_pchan_free()
533 sc->pch_cnt--; in m3_pchan_free()
543 struct sc_info *sc = ch->parent; in m3_pchan_setformat()
548 ("m3_pchan_setformat(dac=%d, format=0x%x{%s-%s})\n", in m3_pchan_setformat()
549 ch->dac_idx, format, in m3_pchan_setformat()
555 m3_wr_assp_data(sc, ch->dac_data + SRC3_MODE_OFFSET, data); in m3_pchan_setformat()
559 m3_wr_assp_data(sc, ch->dac_data + SRC3_WORD_LENGTH_OFFSET, data); in m3_pchan_setformat()
561 ch->fmt = format; in m3_pchan_setformat()
571 struct sc_info *sc = ch->parent; in m3_pchan_setspeed()
576 ch->dac_idx, speed)); in m3_pchan_setspeed()
579 freq--; in m3_pchan_setspeed()
582 m3_wr_assp_data(sc, ch->dac_data + CDATA_FREQUENCY, freq); in m3_pchan_setspeed()
583 ch->spd = speed; in m3_pchan_setspeed()
596 ch->dac_idx, blocksize)); in m3_pchan_setblocksize()
598 return (sndbuf_getblksz(ch->buffer)); in m3_pchan_setblocksize()
605 struct sc_info *sc = ch->parent; in m3_pchan_trigger()
625 for (i = 0; i < sc->pch_cnt; i++) in m3_chan_active()
626 ret += sc->pch[i].active; in m3_chan_active()
628 for (i = 0; i < sc->rch_cnt; i++) in m3_chan_active()
629 ret += sc->rch[i].active; in m3_chan_active()
638 struct sc_info *sc = ch->parent; in m3_pchan_trigger_locked()
646 ("m3_pchan_trigger(dac=%d, go=0x%x{%s})\n", ch->dac_idx, go, in m3_pchan_trigger_locked()
653 if (ch->active) { in m3_pchan_trigger_locked()
656 ch->active = 1; in m3_pchan_trigger_locked()
657 ch->ptr = 0; in m3_pchan_trigger_locked()
658 ch->prevptr = 0; in m3_pchan_trigger_locked()
659 sc->pch_active_cnt++; in m3_pchan_trigger_locked()
669 m3_wr_assp_data(sc, ch->dac_data + CDATA_INSTANCE_READY, 1); in m3_pchan_trigger_locked()
671 sc->pch_active_cnt); in m3_pchan_trigger_locked()
676 if (ch->active == 0) { in m3_pchan_trigger_locked()
679 ch->active = 0; in m3_pchan_trigger_locked()
680 sc->pch_active_cnt--; in m3_pchan_trigger_locked()
691 m3_wr_assp_data(sc, ch->dac_data + CDATA_INSTANCE_READY, 0); in m3_pchan_trigger_locked()
693 sc->pch_active_cnt); in m3_pchan_trigger_locked()
697 /* got play irq, transfer next buffer - ignore if using dma */ in m3_pchan_trigger_locked()
699 /* got rec irq, transfer next buffer - ignore if using dma */ in m3_pchan_trigger_locked()
709 struct sc_info *sc = ch->parent; in m3_pchan_getptr_internal()
712 bus_base = sndbuf_getbufaddr(ch->buffer); in m3_pchan_getptr_internal()
713 hi = m3_rd_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_CURRENTH); in m3_pchan_getptr_internal()
714 lo = m3_rd_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_CURRENTL); in m3_pchan_getptr_internal()
718 ch->dac_idx, bus_crnt - bus_base)); in m3_pchan_getptr_internal()
720 return (bus_crnt - bus_base); /* current byte offset of channel */ in m3_pchan_getptr_internal()
727 struct sc_info *sc = ch->parent; in m3_pchan_getptr()
731 ptr = ch->ptr; in m3_pchan_getptr()
742 M3_DEBUG(CALL, ("m3_pchan_getcaps(dac=%d)\n", ch->dac_idx)); in m3_pchan_getcaps()
747 /* -------------------------------------------------------------------- */
788 idx = sc->rch_cnt; /* adc instance number, no active reuse! */ in m3_rchan_init()
789 M3_DEBUG(CHANGE, ("m3_rchan_init(adc=%d)\n", idx)); in m3_rchan_init()
793 device_printf(sc->dev, "m3_pchan_init not PCMDIR_REC\n"); in m3_rchan_init()
802 dsp_out_size = MINISRC_OUT_BUFFER_SIZE - (0x10 * 2); in m3_rchan_init()
806 ch = &sc->rch[idx]; in m3_rchan_init()
807 ch->adc_idx = idx; in m3_rchan_init()
808 ch->adc_data = adc_data; in m3_rchan_init()
809 if (ch->adc_data + data_bytes/2 >= 0x1c00) { in m3_rchan_init()
811 device_printf(sc->dev, "m3_rchan_init: revb mem exhausted\n"); in m3_rchan_init()
815 ch->buffer = b; in m3_rchan_init()
816 ch->parent = sc; in m3_rchan_init()
817 ch->channel = c; in m3_rchan_init()
818 ch->fmt = SND_FORMAT(AFMT_U8, 1, 0); in m3_rchan_init()
819 ch->spd = DSP_DEFAULT_SPEED; in m3_rchan_init()
821 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, 0, sc->bufsz) != 0) { in m3_rchan_init()
822 device_printf(sc->dev, "m3_rchan_init chn_allocbuf failed\n"); in m3_rchan_init()
826 ch->bufsize = sndbuf_getsize(ch->buffer); in m3_rchan_init()
829 bus_addr = sndbuf_getbufaddr(ch->buffer); in m3_rchan_init()
831 device_printf(sc->dev, "m3_rchan_init unaligned bus_addr\n"); in m3_rchan_init()
834 m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_ADDRL, LO(bus_addr)); in m3_rchan_init()
835 m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_ADDRH, HI(bus_addr)); in m3_rchan_init()
836 m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_END_PLUS_1L, in m3_rchan_init()
837 LO(bus_addr + ch->bufsize)); in m3_rchan_init()
838 m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_END_PLUS_1H, in m3_rchan_init()
839 HI(bus_addr + ch->bufsize)); in m3_rchan_init()
840 m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_CURRENTL, in m3_rchan_init()
842 m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_CURRENTH, in m3_rchan_init()
846 m3_wr_assp_data(sc, ch->adc_data + CDATA_IN_BUF_BEGIN, dsp_in_buf); in m3_rchan_init()
847 m3_wr_assp_data(sc, ch->adc_data + CDATA_IN_BUF_END_PLUS_1, in m3_rchan_init()
849 m3_wr_assp_data(sc, ch->adc_data + CDATA_IN_BUF_HEAD, dsp_in_buf); in m3_rchan_init()
850 m3_wr_assp_data(sc, ch->adc_data + CDATA_IN_BUF_TAIL, dsp_in_buf); in m3_rchan_init()
851 m3_wr_assp_data(sc, ch->adc_data + CDATA_OUT_BUF_BEGIN, dsp_out_buf); in m3_rchan_init()
852 m3_wr_assp_data(sc, ch->adc_data + CDATA_OUT_BUF_END_PLUS_1, in m3_rchan_init()
854 m3_wr_assp_data(sc, ch->adc_data + CDATA_OUT_BUF_HEAD, dsp_out_buf); in m3_rchan_init()
855 m3_wr_assp_data(sc, ch->adc_data + CDATA_OUT_BUF_TAIL, dsp_out_buf); in m3_rchan_init()
858 m3_wr_assp_data(sc, ch->adc_data + SRC3_DIRECTION_OFFSET + 12, in m3_rchan_init()
859 ch->adc_data + 40 + 8); in m3_rchan_init()
860 m3_wr_assp_data(sc, ch->adc_data + CDATA_DMA_CONTROL, in m3_rchan_init()
866 m3_wr_assp_data(sc, ch->adc_data + rv[i].addr, rv[i].val); in m3_rchan_init()
871 (sc->pch_cnt + sc->rch_cnt), in m3_rchan_init()
872 ch->adc_data >> DP_SHIFT_COUNT); in m3_rchan_init()
873 m3_wr_assp_data(sc, KDATA_DMA_XFER0 + (sc->pch_cnt + sc->rch_cnt), in m3_rchan_init()
874 ch->adc_data >> DP_SHIFT_COUNT); in m3_rchan_init()
875 m3_wr_assp_data(sc, KDATA_ADC1_XFER0 + sc->rch_cnt, in m3_rchan_init()
876 ch->adc_data >> DP_SHIFT_COUNT); in m3_rchan_init()
883 sc->rch_cnt++; in m3_rchan_init()
893 struct sc_info *sc = ch->parent; in m3_rchan_free()
896 M3_DEBUG(CHANGE, ("m3_rchan_free(adc=%d)\n", ch->adc_idx)); in m3_rchan_free()
903 (sc->rch_cnt - 1) + sc->pch_cnt, 0); in m3_rchan_free()
905 (sc->rch_cnt - 1) + sc->pch_cnt, 0); in m3_rchan_free()
906 m3_wr_assp_data(sc, KDATA_ADC1_XFER0 + (sc->rch_cnt - 1), 0); in m3_rchan_free()
907 sc->rch_cnt--; in m3_rchan_free()
917 struct sc_info *sc = ch->parent; in m3_rchan_setformat()
922 ("m3_rchan_setformat(dac=%d, format=0x%x{%s-%s})\n", in m3_rchan_setformat()
923 ch->adc_idx, format, in m3_rchan_setformat()
929 m3_wr_assp_data(sc, ch->adc_data + SRC3_MODE_OFFSET, data); in m3_rchan_setformat()
933 m3_wr_assp_data(sc, ch->adc_data + SRC3_WORD_LENGTH_OFFSET, data); in m3_rchan_setformat()
934 ch->fmt = format; in m3_rchan_setformat()
944 struct sc_info *sc = ch->parent; in m3_rchan_setspeed()
948 M3_DEBUG(CHANGE, ("m3_rchan_setspeed(adc=%d, speed=%d)\n", in m3_rchan_setspeed()
949 ch->adc_idx, speed)); in m3_rchan_setspeed()
952 freq--; in m3_rchan_setspeed()
955 m3_wr_assp_data(sc, ch->adc_data + CDATA_FREQUENCY, freq); in m3_rchan_setspeed()
956 ch->spd = speed; in m3_rchan_setspeed()
968 M3_DEBUG(CHANGE, ("m3_rchan_setblocksize(adc=%d, blocksize=%d)\n", in m3_rchan_setblocksize()
969 ch->adc_idx, blocksize)); in m3_rchan_setblocksize()
971 return (sndbuf_getblksz(ch->buffer)); in m3_rchan_setblocksize()
978 struct sc_info *sc = ch->parent; in m3_rchan_trigger()
995 struct sc_info *sc = ch->parent; in m3_rchan_trigger_locked()
1003 ("m3_rchan_trigger(adc=%d, go=0x%x{%s})\n", ch->adc_idx, go, in m3_rchan_trigger_locked()
1010 if (ch->active) { in m3_rchan_trigger_locked()
1013 ch->active = 1; in m3_rchan_trigger_locked()
1014 ch->ptr = 0; in m3_rchan_trigger_locked()
1015 ch->prevptr = 0; in m3_rchan_trigger_locked()
1026 m3_wr_assp_data(sc, ch->adc_data + CDATA_INSTANCE_READY, 1); in m3_rchan_trigger_locked()
1031 if (ch->active == 0) { in m3_rchan_trigger_locked()
1034 ch->active = 0; in m3_rchan_trigger_locked()
1044 m3_wr_assp_data(sc, ch->adc_data + CDATA_INSTANCE_READY, 0); in m3_rchan_trigger_locked()
1049 /* got play irq, transfer next buffer - ignore if using dma */ in m3_rchan_trigger_locked()
1051 /* got rec irq, transfer next buffer - ignore if using dma */ in m3_rchan_trigger_locked()
1061 struct sc_info *sc = ch->parent; in m3_rchan_getptr_internal()
1064 bus_base = sndbuf_getbufaddr(ch->buffer); in m3_rchan_getptr_internal()
1065 hi = m3_rd_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_CURRENTH); in m3_rchan_getptr_internal()
1066 lo = m3_rd_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_CURRENTL); in m3_rchan_getptr_internal()
1069 M3_DEBUG(CALL, ("m3_rchan_getptr(adc=%d) result=%d\n", in m3_rchan_getptr_internal()
1070 ch->adc_idx, bus_crnt - bus_base)); in m3_rchan_getptr_internal()
1072 return (bus_crnt - bus_base); /* current byte offset of channel */ in m3_rchan_getptr_internal()
1079 struct sc_info *sc = ch->parent; in m3_rchan_getptr()
1083 ptr = ch->ptr; in m3_rchan_getptr()
1094 M3_DEBUG(CALL, ("m3_rchan_getcaps(adc=%d)\n", ch->adc_idx)); in m3_rchan_getcaps()
1099 /* -------------------------------------------------------------------- */
1127 mixer_hwvol_mute(sc->dev); in m3_intr()
1130 mixer_hwvol_step(sc->dev, 1, 1); in m3_intr()
1133 mixer_hwvol_step(sc->dev, -1, -1); in m3_intr()
1138 device_printf(sc->dev, "Unknown HWVOL event\n"); in m3_intr()
1159 for (i=0 ; i<sc->pch_cnt ; i++) { in m3_intr()
1160 pch = &sc->pch[i]; in m3_intr()
1161 if (pch->active) { in m3_intr()
1162 pch->ptr = m3_pchan_getptr_internal(pch); in m3_intr()
1163 delta = pch->bufsize + pch->ptr - pch->prevptr; in m3_intr()
1164 delta %= pch->bufsize; in m3_intr()
1165 if (delta < sndbuf_getblksz(pch->buffer)) in m3_intr()
1167 pch->prevptr = pch->ptr; in m3_intr()
1169 chn_intr(pch->channel); in m3_intr()
1173 for (i=0 ; i<sc->rch_cnt ; i++) { in m3_intr()
1174 rch = &sc->rch[i]; in m3_intr()
1175 if (rch->active) { in m3_intr()
1176 rch->ptr = m3_rchan_getptr_internal(rch); in m3_intr()
1177 delta = rch->bufsize + rch->ptr - rch->prevptr; in m3_intr()
1178 delta %= rch->bufsize; in m3_intr()
1179 if (delta < sndbuf_getblksz(rch->buffer)) in m3_intr()
1181 rch->prevptr = rch->ptr; in m3_intr()
1183 chn_intr(rch->channel); in m3_intr()
1192 /* -------------------------------------------------------------------- */
1203 data = pci_read_config(sc->dev, 0x34, 1); in m3_power()
1204 if (pci_read_config(sc->dev, data, 1) == 1) { in m3_power()
1205 pci_write_config(sc->dev, data + 4, state, 1); in m3_power()
1221 data = pci_read_config(sc->dev, PCI_LEGACY_AUDIO_CTRL, 2); in m3_init()
1223 pci_write_config(sc->dev, PCI_LEGACY_AUDIO_CTRL, data, 2); in m3_init()
1279 m3_wr_assp_data(sc, i, 0); /* zero entire dac/adc area */ in m3_init()
1295 /* -------------------------------------------------------------------- */
1299 m3_pci_probe(device_t dev) in m3_pci_probe() argument
1303 M3_DEBUG(CALL, ("m3_pci_probe(0x%x)\n", pci_get_devid(dev))); in m3_pci_probe()
1305 for (card = m3_card_types ; card->pci_id ; card++) { in m3_pci_probe()
1306 if (pci_get_devid(dev) == card->pci_id) { in m3_pci_probe()
1307 device_set_desc(dev, card->name); in m3_pci_probe()
1315 m3_pci_attach(device_t dev) in m3_pci_attach() argument
1326 sc->dev = dev; in m3_pci_attach()
1327 sc->type = pci_get_devid(dev); in m3_pci_attach()
1328 sc->sc_lock = snd_mtxcreate(device_get_nameunit(dev), in m3_pci_attach()
1330 for (card = m3_card_types ; card->pci_id ; card++) { in m3_pci_attach()
1331 if (sc->type == card->pci_id) { in m3_pci_attach()
1332 sc->which = card->which; in m3_pci_attach()
1333 sc->delay1 = card->delay1; in m3_pci_attach()
1334 sc->delay2 = card->delay2; in m3_pci_attach()
1339 if (resource_int_value(device_get_name(dev), device_get_unit(dev), in m3_pci_attach()
1352 pci_enable_busmaster(dev); in m3_pci_attach()
1354 sc->regid = PCIR_BAR(0); in m3_pci_attach()
1355 sc->regtype = SYS_RES_MEMORY; in m3_pci_attach()
1356 sc->reg = bus_alloc_resource_any(dev, sc->regtype, &sc->regid, in m3_pci_attach()
1358 if (!sc->reg) { in m3_pci_attach()
1359 sc->regtype = SYS_RES_IOPORT; in m3_pci_attach()
1360 sc->reg = bus_alloc_resource_any(dev, sc->regtype, &sc->regid, in m3_pci_attach()
1363 if (!sc->reg) { in m3_pci_attach()
1364 device_printf(dev, "unable to allocate register space\n"); in m3_pci_attach()
1367 sc->st = rman_get_bustag(sc->reg); in m3_pci_attach()
1368 sc->sh = rman_get_bushandle(sc->reg); in m3_pci_attach()
1370 sc->irqid = 0; in m3_pci_attach()
1371 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, in m3_pci_attach()
1373 if (!sc->irq) { in m3_pci_attach()
1374 device_printf(dev, "unable to allocate interrupt\n"); in m3_pci_attach()
1378 if (snd_setup_intr(dev, sc->irq, INTR_MPSAFE, m3_intr, sc, &sc->ih)) { in m3_pci_attach()
1379 device_printf(dev, "unable to setup interrupt\n"); in m3_pci_attach()
1383 sc->bufsz = pcm_getbuffersize(dev, M3_BUFSIZE_MIN, M3_BUFSIZE_DEFAULT, in m3_pci_attach()
1387 bus_get_dma_tag(dev), /* parent */ in m3_pci_attach()
1392 sc->bufsz, /* maxsize */ in m3_pci_attach()
1398 &sc->parent_dmat) != 0) { in m3_pci_attach()
1399 device_printf(dev, "unable to create dma tag\n"); in m3_pci_attach()
1408 if (i == -1) { in m3_pci_attach()
1409 device_printf(dev, "unable to initialize the card\n"); in m3_pci_attach()
1414 codec = AC97_CREATE(dev, sc, m3_codec); in m3_pci_attach()
1416 device_printf(dev, "ac97_create error\n"); in m3_pci_attach()
1419 if (mixer_init(dev, ac97_getmixerclass(), codec)) { in m3_pci_attach()
1420 device_printf(dev, "mixer_init error\n"); in m3_pci_attach()
1426 pcm_init(dev, sc); in m3_pci_attach()
1428 if (pcm_addchan(dev, PCMDIR_PLAY, &m3_pch_class, sc)) { in m3_pci_attach()
1429 device_printf(dev, "pcm_addchan (play) error\n"); in m3_pci_attach()
1434 if (pcm_addchan(dev, PCMDIR_REC, &m3_rch_class, sc)) { in m3_pci_attach()
1435 device_printf(dev, "pcm_addchan (rec) error\n"); in m3_pci_attach()
1440 (sc->regtype == SYS_RES_IOPORT)? "port" : "mem", in m3_pci_attach()
1441 rman_get_start(sc->reg), rman_get_start(sc->irq), in m3_pci_attach()
1442 device_get_nameunit(device_get_parent(dev))); in m3_pci_attach()
1443 if (pcm_register(dev, status)) { in m3_pci_attach()
1444 device_printf(dev, "pcm_register error\n"); in m3_pci_attach()
1448 mixer_hwvol_init(dev); in m3_pci_attach()
1453 sc->savemem = malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); in m3_pci_attach()
1460 if (sc->ih) in m3_pci_attach()
1461 bus_teardown_intr(dev, sc->irq, sc->ih); in m3_pci_attach()
1462 if (sc->irq) in m3_pci_attach()
1463 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); in m3_pci_attach()
1464 if (sc->reg) in m3_pci_attach()
1465 bus_release_resource(dev, sc->regtype, sc->regid, sc->reg); in m3_pci_attach()
1466 if (sc->parent_dmat) in m3_pci_attach()
1467 bus_dma_tag_destroy(sc->parent_dmat); in m3_pci_attach()
1468 if (sc->sc_lock) in m3_pci_attach()
1469 snd_mtxfree(sc->sc_lock); in m3_pci_attach()
1475 m3_pci_detach(device_t dev) in m3_pci_detach() argument
1477 struct sc_info *sc = pcm_getdevinfo(dev); in m3_pci_detach()
1482 if ((r = pcm_unregister(dev)) != 0) { in m3_pci_detach()
1491 bus_teardown_intr(dev, sc->irq, sc->ih); in m3_pci_detach()
1492 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); in m3_pci_detach()
1493 bus_release_resource(dev, sc->regtype, sc->regid, sc->reg); in m3_pci_detach()
1494 bus_dma_tag_destroy(sc->parent_dmat); in m3_pci_detach()
1496 free(sc->savemem, M_DEVBUF); in m3_pci_detach()
1497 snd_mtxfree(sc->sc_lock); in m3_pci_detach()
1503 m3_pci_suspend(device_t dev) in m3_pci_suspend() argument
1505 struct sc_info *sc = pcm_getdevinfo(dev); in m3_pci_suspend()
1511 for (i=0 ; i<sc->pch_cnt ; i++) { in m3_pci_suspend()
1512 if (sc->pch[i].active) { in m3_pci_suspend()
1513 m3_pchan_trigger_locked(NULL, &sc->pch[i], in m3_pci_suspend()
1517 for (i=0 ; i<sc->rch_cnt ; i++) { in m3_pci_suspend()
1518 if (sc->rch[i].active) { in m3_pci_suspend()
1519 m3_rchan_trigger_locked(NULL, &sc->rch[i], in m3_pci_suspend()
1533 sc->savemem[index++] = m3_rd_assp_code(sc, i); in m3_pci_suspend()
1535 sc->savemem[index++] = m3_rd_assp_data(sc, i); in m3_pci_suspend()
1545 m3_pci_resume(device_t dev) in m3_pci_resume() argument
1547 struct sc_info *sc = pcm_getdevinfo(dev); in m3_pci_resume()
1565 m3_wr_assp_code(sc, i, sc->savemem[index++]); in m3_pci_resume()
1567 m3_wr_assp_data(sc, i, sc->savemem[index++]); in m3_pci_resume()
1580 if (mixer_reinit(dev) == -1) { in m3_pci_resume()
1581 device_printf(dev, "unable to reinitialize the mixer\n"); in m3_pci_resume()
1587 for (i=0 ; i<sc->pch_cnt ; i++) { in m3_pci_resume()
1588 if (sc->pch[i].active) { in m3_pci_resume()
1589 m3_pchan_trigger_locked(NULL, &sc->pch[i], in m3_pci_resume()
1593 for (i=0 ; i<sc->rch_cnt ; i++) { in m3_pci_resume()
1594 if (sc->rch[i].active) { in m3_pci_resume()
1595 m3_rchan_trigger_locked(NULL, &sc->rch[i], in m3_pci_resume()
1605 m3_pci_shutdown(device_t dev) in m3_pci_shutdown() argument
1607 struct sc_info *sc = pcm_getdevinfo(dev); in m3_pci_shutdown()
1649 if (resource_int_value(device_get_name(sc->dev), in m3_config()
1650 device_get_unit(sc->dev), in m3_config()
1657 data = pci_read_config(sc->dev, PCI_ALLEGRO_CONFIG, 4); in m3_config()
1661 pci_write_config(sc->dev, PCI_ALLEGRO_CONFIG, data, 4); in m3_config()
1664 data = pci_read_config(sc->dev, PCI_ALLEGRO_CONFIG, 4); in m3_config()
1666 if (sc->which == ESS_MAESTRO3) { in m3_config()
1671 pci_write_config(sc->dev, PCI_ALLEGRO_CONFIG, data, 4); in m3_config()
1673 if (sc->which == ESS_ALLEGRO_1) { in m3_config()
1674 data = pci_read_config(sc->dev, PCI_USER_CONFIG, 4); in m3_config()
1676 pci_write_config(sc->dev, PCI_USER_CONFIG, data, 4); in m3_config()
1706 switch (sc->which) { in m3_amp_enable()
1714 panic("bad sc->which"); in m3_amp_enable()
1755 DELAY(sc->delay1 * 1000); /*delay1 (ALLEGRO:50, MAESTRO3:20)*/ in m3_codec_reset()
1761 DELAY(sc->delay2 * 1000); /*delay2 (ALLEGRO:800, MAESTRO3:500)*/ in m3_codec_reset()
1768 device_printf(sc->dev, "Codec reset failed\n"); in m3_codec_reset()
1771 device_printf(sc->dev, "Codec reset retry\n"); in m3_codec_reset()