Lines Matching full:ports
86 return (hc->ports & (HDSPE_CHAN_AIO_ALL | HDSPE_CHAN_RAY_ALL)); in hdspe_channel_play_ports()
92 return (hc->ports & (HDSPE_CHAN_AIO_ALL_REC | HDSPE_CHAN_RAY_ALL)); in hdspe_channel_rec_ports()
106 hdspe_port_first(uint32_t ports) in hdspe_port_first() argument
108 return (ports & (~(ports - 1))); /* Extract first bit set. */ in hdspe_port_first()
112 hdspe_port_first_row(uint32_t ports) in hdspe_port_first_row() argument
116 /* Restrict ports to one set with contiguous slots. */ in hdspe_port_first_row()
117 if (ports & HDSPE_CHAN_AIO_ALL) in hdspe_port_first_row()
118 ports &= HDSPE_CHAN_AIO_ALL; /* All AIO slots. */ in hdspe_port_first_row()
119 else if (ports & HDSPE_CHAN_RAY_ALL) in hdspe_port_first_row()
120 ports &= HDSPE_CHAN_RAY_ALL; /* All RayDAT slots. */ in hdspe_port_first_row()
123 ends = ports & (~(ports >> 1)); in hdspe_port_first_row()
124 /* First row of contiguous ports ends in the first row end. */ in hdspe_port_first_row()
125 return (ports & (ends ^ (ends - 1))); in hdspe_port_first_row()
129 hdspe_channel_count(uint32_t ports, uint32_t adat_width) in hdspe_channel_count() argument
133 if (ports & HDSPE_CHAN_AIO_ALL) { in hdspe_channel_count()
134 /* AIO ports. */ in hdspe_channel_count()
135 if (ports & HDSPE_CHAN_AIO_LINE) in hdspe_channel_count()
137 if (ports & HDSPE_CHAN_AIO_EXT) in hdspe_channel_count()
139 if (ports & HDSPE_CHAN_AIO_PHONE) in hdspe_channel_count()
141 if (ports & HDSPE_CHAN_AIO_AES) in hdspe_channel_count()
143 if (ports & HDSPE_CHAN_AIO_SPDIF) in hdspe_channel_count()
145 if (ports & HDSPE_CHAN_AIO_ADAT) in hdspe_channel_count()
147 } else if (ports & HDSPE_CHAN_RAY_ALL) { in hdspe_channel_count()
148 /* RayDAT ports. */ in hdspe_channel_count()
149 if (ports & HDSPE_CHAN_RAY_AES) in hdspe_channel_count()
151 if (ports & HDSPE_CHAN_RAY_SPDIF) in hdspe_channel_count()
153 if (ports & HDSPE_CHAN_RAY_ADAT1) in hdspe_channel_count()
155 if (ports & HDSPE_CHAN_RAY_ADAT2) in hdspe_channel_count()
157 if (ports & HDSPE_CHAN_RAY_ADAT3) in hdspe_channel_count()
159 if (ports & HDSPE_CHAN_RAY_ADAT4) in hdspe_channel_count()
167 hdspe_channel_offset(uint32_t subset, uint32_t ports, unsigned int adat_width) in hdspe_channel_offset() argument
171 /* Make sure we have a subset of ports. */ in hdspe_channel_offset()
172 subset &= ports; in hdspe_channel_offset()
173 /* Include all ports preceding the first one of the subset. */ in hdspe_channel_offset()
174 preceding = ports & (~subset & (subset - 1)); in hdspe_channel_offset()
187 /* Exctract the first port (lowest bit) if set of ports. */ in hdspe_port_slot_offset()
189 /* AIO ports */ in hdspe_port_slot_offset()
203 /* RayDAT ports */ in hdspe_port_slot_offset()
222 hdspe_port_slot_width(uint32_t ports, unsigned int adat_width) in hdspe_port_slot_width() argument
227 row = hdspe_port_first_row(ports); in hdspe_port_slot_width()
257 uint32_t port, ports; in hdspechan_setgain() local
263 /* Iterate through all physical ports of the channel. */ in hdspechan_setgain()
264 ports = ch->ports; in hdspechan_setgain()
265 port = hdspe_port_first(ports); in hdspechan_setgain()
281 ports &= ~port; in hdspechan_setgain()
282 port = hdspe_port_first(ports); in hdspechan_setgain()
357 uint32_t row, ports; in hdspechan_enable() local
371 /* Iterate through rows of ports with contiguous slots. */ in hdspechan_enable()
372 ports = ch->ports; in hdspechan_enable()
373 row = hdspe_port_first_row(ports); in hdspechan_enable()
384 ports &= ~row; in hdspechan_enable()
385 row = hdspe_port_first_row(ports); in hdspechan_enable()
460 buffer_mux_port(uint32_t *dma, uint32_t *pcm, uint32_t subset, uint32_t ports, in buffer_mux_port() argument
472 chan_pos = hdspe_channel_offset(subset, ports, pcm_width); in buffer_mux_port()
474 channels = hdspe_channel_count(ports, pcm_width); in buffer_mux_port()
506 buffer_demux_port(uint32_t *dma, uint32_t *pcm, uint32_t subset, uint32_t ports, in buffer_demux_port() argument
518 chan_pos = hdspe_channel_offset(subset, ports, pcm_width); in buffer_demux_port()
520 channels = hdspe_channel_count(ports, pcm_width); in buffer_demux_port()
543 uint32_t row, ports; in buffer_copy() local
556 if (n == hdspe_channel_count(ch->ports, 2)) in buffer_copy()
558 else if (n == hdspe_channel_count(ch->ports, 4)) in buffer_copy()
593 /* Iterate through rows of ports with contiguous slots. */ in buffer_copy()
594 ports = ch->ports; in buffer_copy()
596 row = hdspe_port_first_row(ports); in buffer_copy()
598 row = hdspe_port_first(ports); in buffer_copy()
602 buffer_mux_port(sc->pbuf, ch->data, row, ch->ports, pos, in buffer_copy()
605 buffer_demux_port(sc->rbuf, ch->data, row, ch->ports, in buffer_copy()
608 ports &= ~row; in buffer_copy()
610 row = hdspe_port_first_row(ports); in buffer_copy()
612 row = hdspe_port_first(ports); in buffer_copy()
624 uint32_t row, ports; in clean() local
634 /* Iterate through rows of ports with contiguous slots. */ in clean()
635 ports = ch->ports; in clean()
636 row = hdspe_port_first_row(ports); in clean()
645 ports &= ~row; in clean()
646 row = hdspe_port_first_row(ports); in clean()
702 ch->ports = hdspe_channel_play_ports(scp->hc); in hdspechan_init()
704 ch->ports = hdspe_channel_rec_ports(scp->hc); in hdspechan_init()
712 SND_FORMAT(AFMT_S32_LE, hdspe_channel_count(ch->ports, 2), 0); in hdspechan_init()
714 SND_FORMAT(AFMT_S32_LE, hdspe_channel_count(ch->ports, 4), 0); in hdspechan_init()
716 SND_FORMAT(AFMT_S32_LE, hdspe_channel_count(ch->ports, 8), 0); in hdspechan_init()
722 ch->size = HDSPE_CHANBUF_SIZE * hdspe_channel_count(ch->ports, 8); in hdspechan_init()
1049 if (scp->hc->ports & HDSPE_CHAN_AIO_ALL) in hdspe_pcm_attach()
1051 else if (scp->hc->ports & HDSPE_CHAN_RAY_ALL) in hdspe_pcm_attach()
1062 if (hdspe_channel_count(scp->hc->ports, 8) > HDSPE_MATRIX_MAX) in hdspe_pcm_attach()