Lines Matching +full:i2c +full:- +full:alias
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
29 /* -------------------------------------------------------------------- */
40 #define PCIR_MT 0x1c /* Professional Multi-Track I/O Base Address */
47 #define PCIM_LAC_IOADDR10 0x0020 /* I/O Address Alias Control */
48 #define PCIM_LAC_MPU401 0x0008 /* MPU-401 I/O enable */
60 #define PCIM_LCC_MPUBASE 0x0006 /* MPU-401 base 300h-330h */
68 #define PCIM_SCFG_MPU 0x20 /* 1(0)/2(1) MPU-401 UART(s) */
71 #define PCIM_SCFG_ADC 0x0c /* 1-4 stereo ADC connected */
72 #define PCIM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */
74 #define PCIR_ACL 0x61 /* AC-Link Configuration Register */
75 #define PCIM_ACL_MTC 0x80 /* Multi-track converter type: 0:AC'97 1:I2S */
100 #define ENVY24_CCS_CTL_DMAINT 0x40 /* DS DMA Channel-C interrupt */
110 #define ENVY24_CCS_IMASK_PMT 0x10 /* Professional Multi-track */
120 #define ENVY24_CCS_ISTAT_PMT 0x10 /* Professional Multi-track */
170 #define ENVY24_CCS_I2CDEV 0x10 /* I2C Port Device Address Register */
171 #define ENVY24_CCS_I2CDEV_ADDR 0xfe /* I2C device address */
172 #define ENVY24_CCS_I2CDEV_ROM 0xa0 /* reserved for the external I2C E2PROM */
176 #define ENVY24_CCS_I2CADDR 0x11 /* I2C Port Byte Address Register */
177 #define ENVY24_CCS_I2CDATA 0x12 /* I2C Port Read/Write Data Register */
179 #define ENVY24_CCS_I2CSTAT 0x13 /* I2C Port Control and Status Register */
181 #define ENVY24_CCS_I2CSTAT_BSY 0x01 /* I2C port read/write status busy */
237 #define ENVY24_CCI_CPDWN_I2C 0x10 /* I2C port clock */
243 #define ENVY24_CCI_MTPDWN 0x31 /* Multi-Track Section Power Down Register */
247 #define ENVY24_CCI_MTPDWN_I2S 0x01 /* Multi-track I2S serial interface clock */
251 #define ENVY24_DDMA_ADDR0 0x00 /* DMA Base and Current Address bit 0-7 */
252 #define ENVY24_DDMA_ADDR8 0x01 /* DMA Base and Current Address bit 8-15 */
253 #define ENVY24_DDMA_ADDR16 0x02 /* DMA Base and Current Address bit 16-23 */
254 #define ENVY24_DDMA_ADDR24 0x03 /* DMA Base and Current Address bit 24-31 */
255 #define ENVY24_DDMA_CNT0 0x04 /* DMA Base and Current Count 0-7 */
256 #define ENVY24_DDMA_CNT8 0x05 /* DMA Base and Current Count 8-15 */
284 #define ENVY24_CS_CTL_U8 0x04 /* 8-bit unsigned(or 16-bit signed) */
291 /* Professional Multi-Track Control Registers */
294 #define ENVY24_MT_INT_RMASK 0x80 /* Multi-track record interrupt mask */
295 #define ENVY24_MT_INT_PMASK 0x40 /* Multi-track playback interrupt mask */
296 #define ENVY24_MT_INT_RSTAT 0x02 /* Multi-track record interrupt status */
297 #define ENVY24_MT_INT_PSTAT 0x01 /* Multi-track playback interrupt status */
329 #define ENVY24_MT_AC97CMD_ID 0x03 /* ID(0-3) for external AC 97 registers */
364 /* -------------------------------------------------------------------- */
391 #define ENVY24_VOL_MIN 96 /* -144db(negate) */
394 /* -------------------------------------------------------------------- */
398 ENVY24 has input->output data routing matrix switch. But original ENVY24
406 (NOTICE: this class is able to set only DAC-1 and S/PDIF output)
437 /* -------------------------------------------------------------------- */
462 /* GPIO connect map of M-Audio Delta series */
472 /* M-Audio Delta series S/PDIF(CS84[01]4) control pin values */
478 /* M-Audio Delta series parameter */
484 #define PCA9554_I2CDEV 0x40 /* I2C device address */