Lines Matching refs:atiixp_wr
139 #define atiixp_wr(_sc, _reg, _val) \ macro
223 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff); in atiixp_enable_interrupts()
245 atiixp_wr(sc, ATI_REG_IER, value); in atiixp_enable_interrupts()
252 atiixp_wr(sc, ATI_REG_IER, 0); in atiixp_disable_interrupts()
255 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff); in atiixp_disable_interrupts()
268 atiixp_wr(sc, ATI_REG_CMD, value); in atiixp_reset_aclink()
277 atiixp_wr(sc, ATI_REG_CMD, value); in atiixp_reset_aclink()
286 atiixp_wr(sc, ATI_REG_CMD, value); in atiixp_reset_aclink()
299 atiixp_wr(sc, ATI_REG_CMD, value); in atiixp_reset_aclink()
308 atiixp_wr(sc, ATI_REG_CMD, value); in atiixp_reset_aclink()
324 atiixp_wr(sc, ATI_REG_CMD, value); in atiixp_reset_aclink()
330 atiixp_wr(ch->parent, ATI_REG_FIFO_FLUSH, ch->flush_bit); in atiixp_flush_dma()
341 atiixp_wr(ch->parent, ATI_REG_CMD, value); in atiixp_enable_dma()
353 atiixp_wr(ch->parent, ATI_REG_CMD, value); in atiixp_disable_dma()
388 atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data); in atiixp_rdcd()
419 atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data); in atiixp_wrcd()
498 atiixp_wr(sc, ATI_REG_CMD, value); in atiixp_chan_setformat()
506 atiixp_wr(sc, ATI_REG_OUT_DMA_SLOT, value); in atiixp_chan_setformat()
511 atiixp_wr(sc, ATI_REG_CMD, value); in atiixp_chan_setformat()
514 atiixp_wr(sc, ATI_REG_6CH_REORDER, value); in atiixp_chan_setformat()
734 atiixp_wr(sc, ch->linkptr_bit, 0); in atiixp_chan_trigger()
736 atiixp_wr(sc, ch->linkptr_bit, in atiixp_chan_trigger()
818 atiixp_wr(sc, ATI_REG_IER, value); in atiixp_chan_trigger()
913 atiixp_wr(sc, ATI_REG_IER, enable); in atiixp_intr()
918 atiixp_wr(sc, ATI_REG_ISR, status); in atiixp_intr()
948 atiixp_wr(sc, ATI_REG_CMD, value); in atiixp_chip_pre_init()
956 atiixp_wr(sc, ATI_REG_IER, CODEC_CHECK_BITS); in atiixp_chip_pre_init()
1352 atiixp_wr(sc, ATI_REG_CMD, ATI_REG_CMD_POWERDOWN); in atiixp_pci_suspend()