Lines Matching +full:tx +full:- +full:enable
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
39 #define TCR_TXENA 0x0001 /* Enable/disable transmitter */
42 #define TCR_PAD_EN 0x0080 /* Pad TX frames to 64 bytes */
43 #define TCR_NOCRC 0x0100 /* Disable/enable CRC */
45 #define TCR_FDUPLX 0x0800 /* Enable/disable full duplex */
46 #define TCR_STP_SQET 0x1000 /* Stop TX on signal quality error */
52 #define EPHSR_TX_SUC 0x0001 /* Last TX was successful */
53 #define EPHSR_SNGLCOL 0x0002 /* Single collision on last TX */
54 #define EPHSR_MULCOL 0x0004 /* Multiple collisions on last TX */
55 #define EPHSR_LTX_MULT 0x0008 /* Last TX was multicast */
56 #define EPHSR_16COL 0x0010 /* 16 collisions on last TX */
58 #define EPHSR_LTX_BRD 0x0040 /* Last TX was broadcast */
60 #define EPHSR_LATCOL 0x0200 /* Late collision on last TX */
70 #define RCR_PRMS 0x0002 /* Enable/disable promiscuous mode */
72 #define RCR_RXEN 0x0100 /* Enable/disable receiver */
100 #define RPCR_DPLX 0x1000 /* Put PHY in full-duplex mode */
108 #define RPCR_LED_LINK_FDX 0x3 /* Full-duplex link detected */
110 #define RPCR_LED_ACT_ANY 0x4 /* TX or RX activity detected */
112 #define RPCR_LED_ACT_TX 0x7 /* TX activity detected */
116 #define CR_EXT_PHY 0x0200 /* Enable/disable external PHY */
119 #define CR_EPH_POWER_EN 0x8000 /* Disable/enable low power mode */
145 #define CTRL_TE_ENABLE 0x0020 /* TX error causes EPH interrupt */
148 #define CTRL_AUTO_RELEASE 0x0800 /* Automatically release TX packets */
155 #define MMUCR_CMD_TX_ALLOC (1<<5) /* Alloc TX memory (256b chunks) */
160 #define MMUCR_CMD_ENQUEUE (6<<5) /* Enqueue packet for TX */
161 #define MMUCR_CMD_TX_RESET (7<<5) /* Reset TX FIFOs */
180 #define PTR_MASK 0x07ff /* Address accessible within TX/RX */
182 #define PTR_ETEN 0x1000 /* Enable early TX underrun detection */
185 #define PTR_RCV 0x8000 /* Read/write to/from RX/TX */
197 #define TX_INT 0x0002 /* TX */
198 #define TX_EMPTY_INT 0x0004 /* TX empty */
205 #define IST_PRINTF "\20\01RCV\02TX\03TX_EMPTY\04ALLOC" \
216 #define MGMT_MDOE 0x0008 /* MII management output enable */
217 #define MGMT_MSK_CRS100 0x4000 /* Disable CRS100 detection during TX */
258 /* Number of times to spin on TX allocations */