1 /*-
2  * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries.
41 	if (byte_index >= firmware_features->num_elements) {  in pqi_is_firmware_feature_supported()
47 	return (firmware_features->features_supported[byte_index] &  in pqi_is_firmware_feature_supported()
66 		(firmware_features->num_elements * 2);  in pqi_is_firmware_feature_enabled()
89 		firmware_features->num_elements;  in pqi_request_firmware_feature()
92 	firmware_features->features_supported[byte_index] |=  in pqi_request_firmware_feature()
110 	request.header.iu_length = sizeof(request) - PQI_REQUEST_HEADER_LENGTH;  in pqi_config_table_update()
138 	features_requested = firmware_features->features_supported +  in pqi_enable_firmware_features()
139 		firmware_features->num_elements;  in pqi_enable_firmware_features()
142 		(features_requested - (uint8_t*)firmware_features);  in pqi_enable_firmware_features()
144 	 * NOTE: This memcpy is writing to a BAR-mapped address  in pqi_enable_firmware_features()
148 		firmware_features->num_elements);  in pqi_enable_firmware_features()
154 			(firmware_features->num_elements * 2) + sizeof(uint16_t));  in pqi_enable_firmware_features()
156 			 * NOTE: This writes to a BAR-mapped address  in pqi_enable_firmware_features()
183 	if (!firmware_feature->supported) {  in pqi_firmware_feature_status()
185 			firmware_feature->feature_name);  in pqi_firmware_feature_status()
189 	if (firmware_feature->enabled) {  in pqi_firmware_feature_status()
190 		DBG_NOTE("%s enabled\n", firmware_feature->feature_name);  in pqi_firmware_feature_status()
194 	DBG_NOTE("failed to enable %s\n", firmware_feature->feature_name);  in pqi_firmware_feature_status()
201 	switch (firmware_feature->feature_bit) {  in pqi_ctrl_update_feature_flags()
203 		softs->aio_raid1_write_bypass = firmware_feature->enabled;  in pqi_ctrl_update_feature_flags()
206 		softs->aio_raid5_write_bypass = firmware_feature->enabled;  in pqi_ctrl_update_feature_flags()
209 		softs->aio_raid6_write_bypass = firmware_feature->enabled;  in pqi_ctrl_update_feature_flags()
212 		softs->timeout_in_passthrough = true;  in pqi_ctrl_update_feature_flags()
215 		softs->timeout_in_tmf = true;  in pqi_ctrl_update_feature_flags()
220 		softs->page83id_in_rpl = true;  in pqi_ctrl_update_feature_flags()
236 	if (firmware_feature->feature_status)  in pqi_firmware_feature_update()
237 		firmware_feature->feature_status(softs, firmware_feature);  in pqi_firmware_feature_update()
282 		.feature_name = "RAID 0 Read Bypass",
287 		.feature_name = "RAID 1 Read Bypass",
292 		.feature_name = "RAID 5 Read Bypass",
297 		.feature_name = "RAID 6 Read Bypass",
302 		.feature_name = "RAID 0 Write Bypass",
307 		.feature_name = "RAID 1 Write Bypass",
312 		.feature_name = "RAID 5 Write Bypass",
317 		.feature_name = "RAID 6 Write Bypass",
348 			(!softs->sata_unique_wwn)) {  in pqi_process_firmware_features()
375 	/* request driver features that are also on firmware-supported list */  in pqi_process_firmware_features()
387 	/* enable the features that were successfully requested. */  in pqi_process_firmware_features()
391 		DBG_ERR("failed to enable firmware features in PQI configuration table\n");  in pqi_process_firmware_features()
440  * Currently using for heart-beat counter scratch-pad register.
452 	config_table_size = softs->pqi_cap.conf_tab_sz;  in pqisrc_process_config_table()
467 	config_table_abs_addr = (uint8_t *)(softs->pci_mem_base_vaddr +  in pqisrc_process_config_table()
468 					softs->pqi_cap.conf_tab_off);  in pqisrc_process_config_table()
471 			softs->pqi_cap.conf_tab_off,  in pqisrc_process_config_table()
474 	if (memcmp(conf_table->sign, PQI_CONF_TABLE_SIGNATURE,  in pqisrc_process_config_table()
475 			sizeof(conf_table->sign)) != 0) {  in pqisrc_process_config_table()
480 	section_off = LE_32(conf_table->first_section_off);  in pqisrc_process_config_table()
491 		switch (LE_16(section_hdr->section_id)) {  in pqisrc_process_config_table()
501 			softs->heartbeat_counter_off = softs->pqi_cap.conf_tab_off +  in pqisrc_process_config_table()
504 			softs->heartbeat_counter_abs_addr = (uint64_t *)(softs->pci_mem_base_vaddr +  in pqisrc_process_config_table()
505 				softs->heartbeat_counter_off);  in pqisrc_process_config_table()
512 				LE_16(section_hdr->section_id));  in pqisrc_process_config_table()
515 		section_off = LE_16(section_hdr->next_section_off);  in pqisrc_process_config_table()