Lines Matching +full:0 +full:x4060

44 #define PQI_STATUS_SUCCESS			0
47 #define PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE 0
65 #define INVALID_ELEM 0xffff
78 #define INT_MAX 0x7FFFFFFF
87 (offsetof(TYPE, MEMBER) + sizeof(((TYPE *)0)->MEMBER))
125 #define false 0
134 #define INTR_TYPE_NONE 0x0
135 #define INTR_TYPE_FIXED 0x1
136 #define INTR_TYPE_MSI 0x2
137 #define INTR_TYPE_MSIX 0x4
138 #define SIS_ENABLE_MSIX 0x40
139 #define SIS_ENABLE_INTX 0x80
140 #define PQISRC_LEGACY_INTX_MASK 0x1
143 #define DMA_PHYS_LOW(mem) (((mem)->dma_addr) & 0x00000000ffffffff)
144 #define DMA_PHYS_HIGH(mem) ((((mem)->dma_addr) & 0xffffffff00000000) >> 32)
160 RAID_DEVICE = 0x0c,
162 ZBC_DEVICE = 0x14
183 #define SIS_CMD_GET_ADAPTER_PROPERTIES 0x19
184 #define SIS_CMD_GET_COMM_PREFERRED_SETTINGS 0x26
185 #define SIS_CMD_GET_PQI_CAPABILITIES 0x3000
186 #define SIS_CMD_INIT_BASE_STRUCT_ADDRESS 0x1b
188 #define SIS_SUPPORT_EXT_OPT 0x00800000
189 #define SIS_SUPPORT_PQI 0x00000004
190 #define SIS_SUPPORT_PQI_RESET_QUIESCE 0x00000008
192 #define SIS_PQI_RESET_QUIESCE 0x1000000
201 #define REENABLE_SIS 0x1
202 #define TRIGGER_NMI_SIS 0x800000
205 #define PQI_CTRL_KERNEL_UP_AND_RUNNING 0x80
206 #define PQI_CTRL_KERNEL_PANIC 0x100
208 #define SIS_CTL_TO_HOST_DB_DISABLE_ALL 0xFFFFFFFF
209 #define SIS_CTL_TO_HOST_DB_CLEAR 0x00001000
210 #define SIS_CMD_SUBMIT 0x00000200 /* Bit 9 */
211 #define SIS_CMD_COMPLETE 0x00001000 /* Bit 12 */
212 #define SIS_CMD_STATUS_SUCCESS 0x1
217 #define PQISRC_PQI_REG_OFFSET 0x4000
244 #define PQI_ADMIN_IB_QUEUE_ID 0
245 #define PQI_ADMIN_OB_QUEUE_ID 0
267 #define PQISRC_MAX_AIO_RAID1_OR_10_WRITE_2DRV 0x0000 /* No Limit */
268 #define PQISRC_MAX_AIO_RAID1_OR_10_WRITE_3DRV 0x0000 /* No Limit */
270 #define PQISRC_MAX_AIO_NO_LIMIT 0x0000 /* No Limit */
271 #define PQISRC_MAX_AIO_RW_XFER_SAS_SATA_CRYPTO 0x0000 /* No Limit */
278 (sizeof(((bmic_sense_feature_page_io_aio_subpage_t *)0)->header)))
281 /* #define PQISRC_INTR_COALSC_GRAN 0 */
282 /* #define PQISRC_PROTO_BIT_MASK 0 */
283 /* #define PQISRC_SGL_SUPPORTED_BIT_MASK 0 */
288 #define PQI_RESET_ACTION_RESET 0x1
289 #define PQI_RESET_ACTION_COMPLETED 0x2
290 #define PQI_RESET_TYPE_NO_RESET 0x0
291 #define PQI_RESET_TYPE_SOFT_RESET 0x1
292 #define PQI_RESET_TYPE_FIRM_RESET 0x2
293 #define PQI_RESET_TYPE_HARD_RESET 0x3
298 CTRL_SIS_MODE = 0,
303 #define PQI_DEV_STATE_POWER_ON_AND_RESET 0x0
305 #define PQI_DEV_STATE_PQI_STATUS_AVAILABLE 0x1
307 #define PQI_DEV_STATE_ALL_REGISTERS_READY 0x2
309 #define PQI_DEV_STATE_ADMIN_QUEUE_PAIR_READY 0x3
311 #define PQI_DEV_STATE_ERROR 0x4
319 #define PQI_ADDR_ALIGN_MASK_4K 0xFFF/* lsb 12 bits */
320 #define PQI_ADDR_ALIGN_MASK_1K 0x3FF/* lsb 10 bits */
321 #define PQI_ADDR_ALIGN_MASK_64 0x3F /* lsb 6 bits */
322 #define PQI_ADDR_ALIGN_MASK_4 0x3 /* lsb 2 bits */
336 #define PRINT_PQI_SIGNATURE(sign) { int i = 0; \
338 for(i=0;i<8;i++) \
340 si[i] = '\0'; \
343 #define PQI_CONF_TABLE_MAX_LEN ((uint16_t)~0)
348 #define PQI_CONF_TABLE_SECTION_GENERAL_INFO 0
356 #define PQI_FIRMWARE_FEATURE_OFA 0
379 #define PQI_ADMIN_QUEUE_MSIX_DISABLE (0x80000000)
380 #define PQI_ADMIN_QUEUE_MSIX_ENABLE (0 << 31)
382 #define PQI_ADMIN_QUEUE_CONF_FUNC_CREATE_Q_PAIR 0x01
383 #define PQI_ADMIN_QUEUE_CONF_FUNC_DEL_Q_PAIR 0x02
384 #define PQI_ADMIN_QUEUE_CONF_FUNC_STATUS_IDLE 0x00
391 #define REPORT_MANUFACTURER_INFO_DATA_BUF_SIZE 0x80 /* Data buffer size specified in bytes 0-1 of…
394 #define PQI_STANDARD_IU_LENGTH 0x003C /* 60 bytes. */
395 #define PQI_IU_TYPE_GENERAL_ADMIN_REQUEST 0x60
396 #define PQI_IU_TYPE_GENERAL_ADMIN_RESPONSE 0xe0
399 #define PQI_FUNCTION_REPORT_DEV_CAP 0x00
400 #define PQI_REQUEST_IU_RAID_TASK_MANAGEMENT 0x13
401 #define PQI_IU_TYPE_RAID_PATH_IO_REQUEST 0x14
402 #define PQI_IU_TYPE_AIO_PATH_IO_REQUEST 0x15
403 #define PQI_REQUEST_IU_AIO_TASK_MANAGEMENT 0x16
404 #define PQI_IU_TYPE_RAID5_WRITE_BYPASS_REQUEST 0x18
405 #define PQI_IU_TYPE_RAID6_WRITE_BYPASS_REQUEST 0x19
406 #define PQI_IU_TYPE_RAID1_WRITE_BYPASS_REQUEST 0x1A
407 #define PQI_REQUEST_IU_AIO_BYPASS_TASK_MGMT 0x20
408 #define PQI_REQUEST_IU_GENERAL_ADMIN 0x60
409 #define PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG 0x72
410 #define PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG 0x73
411 #define PQI_REQUEST_IU_VENDOR_GENERAL 0x75
412 #define PQI_RESPONSE_IU_GENERAL_MANAGEMENT 0x81
413 #define PQI_RESPONSE_IU_TASK_MANAGEMENT 0x93
414 #define PQI_RESPONSE_IU_GENERAL_ADMIN 0xe0
416 #define PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS 0xf0
417 #define PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS 0xf1
418 #define PQI_RESPONSE_IU_RAID_PATH_IO_ERROR 0xf2
419 #define PQI_RESPONSE_IU_AIO_PATH_IO_ERROR 0xf3
420 #define PQI_RESPONSE_IU_AIO_PATH_IS_OFF 0xf4
421 #define PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT 0xf6
422 #define PQI_RESPONSE_IU_VENDOR_GENERAL 0xf7
424 #define PQI_FUNCTION_CREATE_OPERATIONAL_IQ 0x10
425 #define PQI_FUNCTION_CREATE_OPERATIONAL_OQ 0x11
426 #define PQI_FUNCTION_DELETE_OPERATIONAL_IQ 0x12
427 #define PQI_FUNCTION_DELETE_OPERATIONAL_OQ 0x13
428 #define PQI_FUNCTION_CHANGE_OPERATIONAL_IQ_PROP 0x14
431 #define PQI_DEFAULT_IB_QUEUE 0
432 #define PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE 0
434 #define PQI_VENDOR_RESPONSE_IU_SUCCESS 0
462 & 0x0000FFFF)
465 #define PQI_CTRL_PRODUCT_ID_GEN1 0x0000
466 #define PQI_CTRL_PRODUCT_ID_GEN2_REV_A 0x0007
467 #define PQI_CTRL_PRODUCT_ID_GEN2_REV_B 0x0107
473 #define PQI_REQUEST_IU_REPORT_EVENT_CONFIG 0x72
474 #define PQI_REQUEST_IU_SET_EVENT_CONFIG 0x73
475 #define PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT 0xf6
478 #define PQI_RESPONSE_IU_GENERAL_MANAGEMENT 0x81
487 #define PQI_EVENT_TYPE_HOTPLUG 0x1
488 #define PQI_EVENT_TYPE_HARDWARE 0x2
489 #define PQI_EVENT_TYPE_PHYSICAL_DEVICE 0x4
490 #define PQI_EVENT_TYPE_LOGICAL_DEVICE 0x5
491 #define PQI_EVENT_TYPE_AIO_STATE_CHANGE 0xfd
492 #define PQI_EVENT_TYPE_AIO_CONFIG_CHANGE 0xfe
495 #define PQI_EVENT_HOTPLUG 0
505 #define PQISRC_DFLAG_VALID (1 << 0)
511 #define SG_FLAG_LAST 0x40000000
512 #define SG_FLAG_CHAIN 0x80000000
522 #define SOP_DATA_DIR_UNKNOWN 0xFF
523 #define SOP_DATA_DIR_NONE 0x00
524 #define SOP_DATA_DIR_FROM_DEVICE 0x01
525 #define SOP_DATA_DIR_TO_DEVICE 0x02
526 #define SOP_DATA_DIR_BIDIRECTIONAL 0x03
527 #define SOP_PARTIAL_DATA_BUFFER 0x04
529 #define PQISRC_DMA_VALID (1 << 0)
532 #define SOP_TASK_ATTRIBUTE_SIMPLE 0
537 #define SOP_TASK_MANAGEMENT_FUNCTION_COMPLETE 0x0
538 #define SOP_TASK_MANAGEMENT_FUNCTION_REJECTED 0x4
539 #define SOP_TASK_MANAGEMENT_FUNCTION_FAILED 0x5
540 #define SOP_TASK_MANAGEMENT_FUNCTION_SUCCEEDED 0x8
541 #define SOP_TASK_MANAGEMENT_FUNCTION_ABORT_TASK 0x01
542 #define SOP_TASK_MANAGEMENT_FUNCTION_ABORT_TASK_SET 0x02
543 #define SOP_TASK_MANAGEMENT_LUN_RESET 0x8
547 #define PQI_ADDITIONAL_CDB_BYTES_0 0 /* 16 byte CDB */
553 #define PQI_PROTOCOL_SOP 0x0
555 #define PQI_AIO_STATUS_GOOD 0x0
556 #define PQI_AIO_STATUS_CHECK_CONDITION 0x2
557 #define PQI_AIO_STATUS_CONDITION_MET 0x4
558 #define PQI_AIO_STATUS_DEVICE_BUSY 0x8
559 #define PQI_AIO_STATUS_INT_GOOD 0x10
560 #define PQI_AIO_STATUS_INT_COND_MET 0x14
561 #define PQI_AIO_STATUS_RESERV_CONFLICT 0x18
562 #define PQI_AIO_STATUS_CMD_TERMINATED 0x22
563 #define PQI_AIO_STATUS_QUEUE_FULL 0x28
564 #define PQI_AIO_STATUS_TASK_ABORTED 0x40
565 #define PQI_AIO_STATUS_UNDERRUN 0x51
566 #define PQI_AIO_STATUS_OVERRUN 0x75
568 #define PQI_AIO_STATUS_IO_ERROR 0x1
569 #define PQI_AIO_STATUS_IO_ABORTED 0x2
570 #define PQI_AIO_STATUS_IO_NO_DEVICE 0x3
571 #define PQI_AIO_STATUS_INVALID_DEVICE 0x4
572 #define PQI_AIO_STATUS_AIO_PATH_DISABLED 0xe
575 #define PQI_AIO_SERV_RESPONSE_COMPLETE 0
600 #define SCSI_VPD_SUPPORTED_PAGES 0x0 /* standard page */
601 #define SCSI_VPD_DEVICE_ID 0x83 /* standard page */
602 #define SA_VPD_PHYS_DEVICE_ID 0xc0 /* vendor-specific page */
603 #define SA_VPD_LV_DEVICE_GEOMETRY 0xc1 /* vendor-specific page */
604 #define SA_VPD_LV_IOACCEL_STATUS 0xc2 /* vendor-specific page */
605 #define SA_VPD_LV_STATUS 0xc3 /* vendor-specific page */
611 #define SA_LV_OK 0x0
612 #define SA_LV_FAILED 0x1
613 #define SA_LV_NOT_CONFIGURED 0x2
614 #define SA_LV_DEGRADED 0x3
615 #define SA_LV_READY_FOR_RECOVERY 0x4
616 #define SA_LV_UNDERGOING_RECOVERY 0x5
617 #define SA_LV_WRONG_PHYSICAL_DRIVE_REPLACED 0x6
618 #define SA_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM 0x7
619 #define SA_LV_HARDWARE_OVERHEATING 0x8
620 #define SA_LV_HARDWARE_HAS_OVERHEATED 0x9
621 #define SA_LV_UNDERGOING_EXPANSION 0xA
622 #define SA_LV_NOT_AVAILABLE 0xb
623 #define SA_LV_QUEUED_FOR_EXPANSION 0xc
624 #define SA_LV_DISABLED_SCSI_ID_CONFLICT 0xd
625 #define SA_LV_EJECTED 0xe
626 #define SA_LV_UNDERGOING_ERASE 0xf
627 #define SA_LV_UNDERGOING_RPI 0x12
628 #define SA_LV_PENDING_RPI 0x13
629 #define SA_LV_ENCRYPTED_NO_KEY 0x14
630 #define SA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER 0x15
631 #define SA_LV_UNDERGOING_ENCRYPTION 0x16
632 #define SA_LV_UNDERGOING_ENCRYPTION_REKEYING 0x17
633 #define SA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER 0x18
634 #define SA_LV_PENDING_ENCRYPTION 0x19
635 #define SA_LV_PENDING_ENCRYPTION_REKEYING 0x1a
636 #define SA_LV_STATUS_VPD_UNSUPPORTED 0xff
640 #define SA_LV_FLAGS_NO_HOST_IO 0x1 /* volume not available for */
647 /* 0 = no limit */
648 #define PQI_LOGICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH 0
649 #define PQI_LOG_EXT_QUEUE_DEPTH_ENABLED 0x20
650 #define PQI_LOG_EXT_QUEUE_ENABLE 0x56
653 #define PQI_PTRAID_UPDATE_ON_RESCAN_LUNS 0x80000000
655 #define RAID_CTLR_LUNID ((uint8_t *) "\0\0\0\0\0\0\0\0")
658 #define SCSI_INQUIRY 0x12
659 #define SCSI_MODE_SENSE 0x1a
660 #define SCSI_REPORT_LUNS 0xa0
661 #define SCSI_LOG_SENSE 0x4d
662 #define SCSI_ATA_PASSTHRU16 0x85
666 #define SA_INQUIRY 0x12
667 #define SA_REPORT_LOG 0xc2 /* Report Logical LUNs */
668 #define SA_REPORT_PHYS 0xc3 /* Report Physical LUNs */
669 #define SA_CISS_READ 0xc0
670 #define SA_GET_RAID_MAP 0xc8
672 #define SCSI_SENSE_RESPONSE_70 0x70
673 #define SCSI_SENSE_RESPONSE_71 0x71
674 #define SCSI_SENSE_RESPONSE_72 0x72
675 #define SCSI_SENSE_RESPONSE_73 0x73
677 #define SA_REPORT_LOG_EXTENDED 0x1
678 #define SA_REPORT_PHYS_EXTENDED 0x2
682 #define REPORT_LUN_DEV_FLAG_AIO_ENABLED 0x8
685 #define RAID_MAP_ENCRYPTION_ENABLED 0x1
688 #define ASC_LUN_NOT_READY 0x4
689 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x4
690 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x2
700 #define OFFLOAD_CONFIGURED_BIT 0x1
701 #define OFFLOAD_ENABLED_BIT 0x2
703 #define PQI_RAID_DATA_IN_OUT_GOOD 0x0
704 #define PQI_RAID_DATA_IN_OUT_UNDERFLOW 0x1
705 #define PQI_RAID_DATA_IN_OUT_BUFFER_ERROR 0x40
706 #define PQI_RAID_DATA_IN_OUT_BUFFER_OVERFLOW 0x41
707 #define PQI_RAID_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA 0x42
708 #define PQI_RAID_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE 0x43
709 #define PQI_RAID_DATA_IN_OUT_PCIE_FABRIC_ERROR 0x60
710 #define PQI_RAID_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT 0x61
711 #define PQI_RAID_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED 0x62
712 #define PQI_RAID_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ 0x63
713 #define PQI_RAID_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED 0x64
714 #define PQI_RAID_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST 0x65
715 #define PQI_RAID_DATA_IN_OUT_PCIE_ACS_VIOLATION 0x66
716 #define PQI_RAID_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED 0x67
717 #define PQI_RAID_DATA_IN_OUT_ERROR 0xf0
718 #define PQI_RAID_DATA_IN_OUT_PROTOCOL_ERROR 0xf1
719 #define PQI_RAID_DATA_IN_OUT_HARDWARE_ERROR 0xf2
720 #define PQI_RAID_DATA_IN_OUT_UNSOLICITED_ABORT 0xf3
721 #define PQI_RAID_DATA_IN_OUT_ABORTED 0xf4
722 #define PQI_RAID_DATA_IN_OUT_TIMEOUT 0xf5
725 #define PQI_PHYSICAL_DEVICE_BUS 0
731 #define TEST_UNIT_READY 0x00
741 #define PQI_CTLR_INDEX 0
744 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
759 #define SA_RAID_0 0
765 #define SA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
767 #define SA_RAID_UNKNOWN 0xff
769 #define BIT0 (1 << 0)
778 #define BMIC_READ 0x26
779 #define BMIC_WRITE 0x27
782 #define BMIC_IDENTIFY_CONTROLLER 0x11
783 #define BMIC_IDENTIFY_PHYSICAL_DEVICE 0x15
784 #define BMIC_SENSE_FEATURE 0x61
785 #define BMIC_SENSE_CONTROLLER_PARAMETERS 0x64
786 #define BMIC_SENSE_SUBSYSTEM_INFORMATION 0x66
787 #define BMIC_WRITE_HOST_WELLNESS 0xa5
788 #define BMIC_CACHE_FLUSH 0xc2
789 #define BMIC_SET_DIAGS_OPTIONS 0xf4
790 #define BMIC_SENSE_DIAGS_OPTIONS 0xf5
791 #define BMIC_FLASH_FIRMWARE 0xf7
794 #define IO_SENSE_FEATURES_PAGE 0x08
795 #define SENSE_FEATURES_AIO_SUBPAGE 0x02
797 #define MASKED_DEVICE(lunid) ((lunid)[3] & 0xC0)
798 #define BMIC_GET_LEVEL_2_BUS(lunid) ((lunid)[7] & 0x3F)
804 (((reportlun_ext_entry_t *)(rle))->device_flags & 0x1)
808 #define BMIC_DEVICE_TYPE_SATA 0x1
818 #define COUNTER_FLAG_CLEAR_COUNTS 0x0001
819 #define COUNTER_FLAG_ONLY_NON_ZERO 0x0002
822 #define PRINT_FLAG_HDR_COLUMN 0x0001
826 #if 0
834 return p[0] | p[1] << 8; in GET_LE16()
839 return p[0] | p[1] << 8 | p[2] << 16 | p[3] << 24; in GET_LE32()
850 return p[0] << 8 | p[1]; in GET_BE16()
855 return p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3]; in GET_BE32()
886 uint64_t percent = 0; in CALC_PERCENT_TOTAL()
911 #define CCISS_GETDRIVVER _IOWR(SMARTPQI_IOCTL_BASE, 0, driver_info)
942 #define PQISRC_DRIVER_RELEASE 0
992 pqisrc_process_event_intr_src(softs, 0);\
1008 #define LEGACY_SIS_IOAR 0x18 /* IOA->host interrupt register */
1009 #define LEGACY_SIS_IDBR 0x20 /* inbound doorbell register */
1010 #define LEGACY_SIS_IISR 0x24 /* inbound interrupt status register */
1011 #define LEGACY_SIS_OIMR 0x34 /* outbound interrupt mask register */
1012 #define LEGACY_SIS_ODBR_R 0x9c /* outbound doorbell register read */
1013 #define LEGACY_SIS_ODBR_C 0xa0 /* outbound doorbell register clear */
1015 #define LEGACY_SIS_SCR0 0xb0 /* scratchpad 0 */
1016 #define LEGACY_SIS_OMR 0xbc /* outbound message register */
1017 #define LEGACY_SIS_IQUE64_L 0xc0 /* inbound queue address 64-bit (low) */
1018 #define LEGACY_SIS_IQUE64_H 0xc4 /* inbound queue address 64-bit (high)*/
1019 #define LEGACY_SIS_ODBR_MSI 0xc8 /* MSI register for sync./AIF */
1020 #define LEGACY_SIS_IQN_L 0xd0 /* inbound queue native mode (low) */
1021 #define LEGACY_SIS_IQN_H 0xd4 /* inbound queue native mode (high)*/
1022 #define LEGACY_SIS_MAILBOX 0x7fc60 /* mailbox (20 bytes) */
1023 #define LEGACY_SIS_SRCV_MAILBOX 0x1000 /* mailbox (20 bytes) */
1024 #define LEGACY_SIS_SRCV_OFFSET_MAILBOX_7 0x101C /* mailbox 7 register offset */
1034 #define PQI_SIGNATURE 0x4000
1035 #define PQI_ADMINQ_CONFIG 0x4008
1036 #define PQI_ADMINQ_CAP 0x4010
1037 #define PQI_LEGACY_INTR_STATUS 0x4018
1038 #define PQI_LEGACY_INTR_MASK_SET 0x401C
1039 #define PQI_LEGACY_INTR_MASK_CLR 0x4020
1040 #define PQI_DEV_STATUS 0x4040
1041 #define PQI_ADMIN_IBQ_PI_OFFSET 0x4048
1042 #define PQI_ADMIN_OBQ_CI_OFFSET 0x4050
1043 #define PQI_ADMIN_IBQ_ELEM_ARRAY_ADDR 0x4058
1044 #define PQI_ADMIN_OBQ_ELEM_ARRAY_ADDR 0x4060
1045 #define PQI_ADMIN_IBQ_CI_ADDR 0x4068
1046 #define PQI_ADMIN_OBQ_PI_ADDR 0x4070
1047 #define PQI_ADMINQ_PARAM 0x4078
1048 #define PQI_DEV_ERR 0x4080
1049 #define PQI_DEV_ERR_DETAILS 0x4088
1050 #define PQI_DEV_RESET 0x4090
1051 #define PQI_POWER_ACTION 0x4094
1068 #define PQI_HWIF_SRCV 0
1072 #define SMART_STATE_SUSPEND (1<<0)
1078 #define PQI_FLAG_BUSY (1<<0)
1226 #define BSD_SUCCESS 0
1227 #define DEVICE_HINT_SUCCESS 0
1237 #define PQISRC_FLAGS_MASK 0x0000ffff
1238 #define PQISRC_FLAGS_INIT 0x00000001
1239 #define PQISRC_FLAGS_INFO 0x00000002
1240 #define PQISRC_FLAGS_FUNC 0x00000004
1241 #define PQISRC_FLAGS_TRACEIO 0x00000008
1242 #define PQISRC_FLAGS_DISC 0x00000010
1243 #define PQISRC_FLAGS_WARN 0x00000020
1244 #define PQISRC_FLAGS_ERROR 0x00000040
1245 #define PQISRC_FLAGS_NOTE 0x00000080
1256 }while(0);
1263 }while(0);
1270 }while(0);
1277 }while(0);
1284 }while(0);
1291 }while(0);
1298 }while(0);
1304 }while(0);
1310 }while(0);
1317 }while(0);
1324 }while(0);
1331 }while(0);