Lines Matching +full:0 +full:x8006
127 #if 0
146 "SysKonnect Gigabit Ethernet (V1.0)"
151 "SysKonnect Gigabit Ethernet (V2.0)"
183 { 0, 0, NULL }
265 static int jumbo_disable = 0;
270 * capability for Tx and I believe it can generate 0 checksum value for
272 * TCP packets. 0 chcecksum value for UDP packet is an invalid one as it
334 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
335 { -1, 0, 0 }
339 { SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE },
340 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
341 { -1, 0, 0 }
450 v = 0; in sk_miibus_readreg()
477 v = 0; in sk_miibus_writereg()
516 for (i = 0; i < SK_TIMEOUT; i++) { in sk_xmac_miibus_readreg()
525 return(0); in sk_xmac_miibus_readreg()
540 for (i = 0; i < SK_TIMEOUT; i++) { in sk_xmac_miibus_writereg()
551 for (i = 0; i < SK_TIMEOUT; i++) { in sk_xmac_miibus_writereg()
559 return(0); in sk_xmac_miibus_writereg()
590 return(0); in sk_marv_miibus_readreg()
596 for (i = 0; i < SK_TIMEOUT; i++) { in sk_marv_miibus_readreg()
605 return(0); in sk_marv_miibus_readreg()
622 for (i = 0; i < SK_TIMEOUT; i++) { in sk_marv_miibus_writereg()
624 if ((SK_YU_READ_2(sc_if, YUKON_SMICR) & YU_SMICR_BUSY) == 0) in sk_marv_miibus_writereg()
630 return(0); in sk_marv_miibus_writereg()
659 SK_XM_WRITE_2(sc_if, base, addr[0]); in sk_setfilt()
703 ctx->hashes[0] |= (1 << h); in sk_add_maddr_genesis()
715 struct sk_add_maddr_genesis_ctx ctx = { sc_if, { 0, 0 } }; in sk_rxfilter_genesis()
717 u_int16_t dummy[] = { 0, 0, 0 }; in sk_rxfilter_genesis()
734 ctx.hashes[0] = 0xFFFFFFFF; in sk_rxfilter_genesis()
735 ctx.hashes[1] = 0xFFFFFFFF; in sk_rxfilter_genesis()
741 SK_XM_WRITE_4(sc_if, XM_MAR0, ctx.hashes[0]); in sk_rxfilter_genesis()
752 crc &= 0x3f; in sk_hash_maddr_yukon()
754 hashes[crc >> 5] |= 1 << (crc & 0x1f); in sk_hash_maddr_yukon()
763 uint32_t hashes[2] = { 0, 0 }, mode; in sk_rxfilter_yukon()
773 hashes[0] = 0xFFFFFFFF; in sk_rxfilter_yukon()
774 hashes[1] = 0xFFFFFFFF; in sk_rxfilter_yukon()
778 if (hashes[0] != 0 || hashes[1] != 0) in sk_rxfilter_yukon()
782 SK_YU_WRITE_2(sc_if, YUKON_MCAH1, hashes[0] & 0xffff); in sk_rxfilter_yukon()
783 SK_YU_WRITE_2(sc_if, YUKON_MCAH2, (hashes[0] >> 16) & 0xffff); in sk_rxfilter_yukon()
784 SK_YU_WRITE_2(sc_if, YUKON_MCAH3, hashes[1] & 0xffff); in sk_rxfilter_yukon()
785 SK_YU_WRITE_2(sc_if, YUKON_MCAH4, (hashes[1] >> 16) & 0xffff); in sk_rxfilter_yukon()
797 sc_if->sk_cdata.sk_rx_cons = 0; in sk_init_rx_ring()
803 for (i = 0; i < SK_RX_RING_CNT; i++) { in sk_init_rx_ring()
804 if (sk_newbuf(sc_if, i) != 0) in sk_init_rx_ring()
807 addr = SK_RX_RING_ADDR(sc_if, 0); in sk_init_rx_ring()
818 return(0); in sk_init_rx_ring()
829 sc_if->sk_cdata.sk_jumbo_rx_cons = 0; in sk_init_jumbo_rx_ring()
836 for (i = 0; i < SK_JUMBO_RX_RING_CNT; i++) { in sk_init_jumbo_rx_ring()
837 if (sk_jumbo_newbuf(sc_if, i) != 0) in sk_init_jumbo_rx_ring()
840 addr = SK_JUMBO_RX_RING_ADDR(sc_if, 0); in sk_init_jumbo_rx_ring()
851 return (0); in sk_init_jumbo_rx_ring()
865 sc_if->sk_cdata.sk_tx_prod = 0; in sk_init_tx_ring()
866 sc_if->sk_cdata.sk_tx_cons = 0; in sk_init_tx_ring()
867 sc_if->sk_cdata.sk_tx_cnt = 0; in sk_init_tx_ring()
871 for (i = 0; i < SK_TX_RING_CNT; i++) { in sk_init_tx_ring()
873 addr = SK_TX_RING_ADDR(sc_if, 0); in sk_init_tx_ring()
929 sc_if->sk_cdata.sk_rx_sparemap, m, segs, &nsegs, 0) != 0) { in sk_newbuf()
948 r->sk_data_lo = htole32(SK_ADDR_LO(segs[0].ds_addr)); in sk_newbuf()
949 r->sk_data_hi = htole32(SK_ADDR_HI(segs[0].ds_addr)); in sk_newbuf()
950 r->sk_ctl = htole32(segs[0].ds_len | SK_RXSTAT | SK_OPCODE_CSUM); in sk_newbuf()
952 return (0); in sk_newbuf()
977 sc_if->sk_cdata.sk_jumbo_rx_sparemap, m, segs, &nsegs, 0) != 0) { in sk_jumbo_newbuf()
997 r->sk_data_lo = htole32(SK_ADDR_LO(segs[0].ds_addr)); in sk_jumbo_newbuf()
998 r->sk_data_hi = htole32(SK_ADDR_HI(segs[0].ds_addr)); in sk_jumbo_newbuf()
999 r->sk_ctl = htole32(segs[0].ds_len | SK_RXSTAT | SK_OPCODE_CSUM); in sk_jumbo_newbuf()
1001 return (0); in sk_jumbo_newbuf()
1017 return(0); in sk_ifmedia_upd()
1047 error = 0; in sk_ioctl()
1053 if (sc_if->sk_jumbo_disable != 0 && in sk_ioctl()
1060 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); in sk_ioctl()
1102 if ((mask & IFCAP_TXCSUM) != 0 && in sk_ioctl()
1103 (IFCAP_TXCSUM & if_getcapabilities(ifp)) != 0) { in sk_ioctl()
1105 if ((if_getcapenable(ifp) & IFCAP_TXCSUM) != 0) in sk_ioctl()
1106 if_sethwassistbits(ifp, SK_CSUM_FEATURES, 0); in sk_ioctl()
1108 if_sethwassistbits(ifp, 0, SK_CSUM_FEATURES); in sk_ioctl()
1110 if ((mask & IFCAP_RXCSUM) != 0 && in sk_ioctl()
1111 (IFCAP_RXCSUM & if_getcapabilities(ifp)) != 0) in sk_ioctl()
1255 u_char inv_mac[] = {0, 0, 0, 0, 0, 0}; in sk_attach()
1260 error = 0; in sk_attach()
1274 callout_init_mtx(&sc_if->sk_tick_ch, &sc_if->sk_softc->sk_mtx, 0); in sk_attach()
1275 callout_init_mtx(&sc_if->sk_watchdog_ch, &sc_if->sk_softc->sk_mtx, 0); in sk_attach()
1277 if (sk_dma_alloc(sc_if) != 0) { in sk_attach()
1292 if_sethwassist(ifp, 0); in sk_attach()
1294 if_setcapabilities(ifp, 0); in sk_attach()
1295 if_sethwassist(ifp, 0); in sk_attach()
1307 if_setcapenablebit(ifp, 0, IFCAP_TXCSUM); in sk_attach()
1324 for (i = 0; i < ETHER_ADDR_LEN; i++) in sk_attach()
1329 if (bcmp(eaddr, inv_mac, sizeof(inv_mac)) == 0) { in sk_attach()
1335 * is 0x62, which has the locally assigned bit set, and in sk_attach()
1338 eaddr[0] = 'b'; in sk_attach()
1341 eaddr[3] = (r >> 16) & 0xff; in sk_attach()
1342 eaddr[4] = (r >> 8) & 0xff; in sk_attach()
1343 eaddr[5] = (r >> 0) & 0xff; in sk_attach()
1382 sc_if->sk_phytype = sk_win_read_1(sc, SK_EPROM1) & 0xF; in sk_attach()
1421 * XMAC II has 0x8100 in VLAN Tag Level 1 register initially; in sk_attach()
1425 if_setcapabilitiesbit(ifp, IFCAP_VLAN_MTU, 0); in sk_attach()
1426 if_setcapenablebit(ifp, IFCAP_VLAN_MTU, 0); in sk_attach()
1442 phy = 0; in sk_attach()
1448 phy = 0; in sk_attach()
1454 sk_ifmedia_sts, BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0); in sk_attach()
1455 if (error != 0) { in sk_attach()
1479 int error = 0, *port; in skc_attach()
1517 sc->sk_rev = (sk_win_read_1(sc, SK_CONFIG) >> 4) & 0xf; in skc_attach()
1531 &sc->sk_int_mod, 0, sysctl_hw_sk_int_mod, "I", in skc_attach()
1538 if (error == 0) { in skc_attach()
1555 sc->sk_ramsize = 0x80000; in skc_attach()
1559 sc->sk_ramsize = 0x100000; in skc_attach()
1563 sc->sk_ramsize = 0x100000; in skc_attach()
1567 sc->sk_ramsize = 0x200000; in skc_attach()
1576 if (skrs == 0x00) in skc_attach()
1577 sc->sk_ramsize = 0x20000; in skc_attach()
1589 sc->sk_coppertype = 0; in skc_attach()
1632 sk_win_write_1(sc, SK_EP_ADDR+0x03, 0xff); in skc_attach()
1633 testbyte = sk_win_read_1(sc, SK_EP_ADDR+0x03); in skc_attach()
1635 if (testbyte != 0x00) { in skc_attach()
1674 device_printf(dev, "%s rev. %s(0x%x)\n", in skc_attach()
1678 device_printf(dev, "chip ver = 0x%02x\n", sc->sk_type); in skc_attach()
1679 device_printf(dev, "chip rev = 0x%02x\n", sc->sk_rev); in skc_attach()
1680 device_printf(dev, "SK_EPROM0 = 0x%02x\n", skrs); in skc_attach()
1681 device_printf(dev, "SRAM size = 0x%06x\n", sc->sk_ramsize); in skc_attach()
1781 return(0); in sk_detach()
1801 return(0); in skc_detach()
1820 if (error != 0) in sk_dmamap_cb()
1824 ctx->sk_busaddr = segs[0].ds_addr; in sk_dmamap_cb()
1855 1, 0, /* algnmnt, boundary */ in sk_dma_alloc()
1860 0, /* nsegments */ in sk_dma_alloc()
1862 0, /* flags */ in sk_dma_alloc()
1865 if (error != 0) { in sk_dma_alloc()
1873 SK_RING_ALIGN, 0, /* algnmnt, boundary */ in sk_dma_alloc()
1880 0, /* flags */ in sk_dma_alloc()
1883 if (error != 0) { in sk_dma_alloc()
1891 SK_RING_ALIGN, 0, /* algnmnt, boundary */ in sk_dma_alloc()
1898 0, /* flags */ in sk_dma_alloc()
1901 if (error != 0) { in sk_dma_alloc()
1909 1, 0, /* algnmnt, boundary */ in sk_dma_alloc()
1916 0, /* flags */ in sk_dma_alloc()
1919 if (error != 0) { in sk_dma_alloc()
1927 1, 0, /* algnmnt, boundary */ in sk_dma_alloc()
1934 0, /* flags */ in sk_dma_alloc()
1937 if (error != 0) { in sk_dma_alloc()
1947 if (error != 0) { in sk_dma_alloc()
1953 ctx.sk_busaddr = 0; in sk_dma_alloc()
1957 if (error != 0) { in sk_dma_alloc()
1968 if (error != 0) { in sk_dma_alloc()
1974 ctx.sk_busaddr = 0; in sk_dma_alloc()
1978 if (error != 0) { in sk_dma_alloc()
1986 for (i = 0; i < SK_TX_RING_CNT; i++) { in sk_dma_alloc()
1990 error = bus_dmamap_create(sc_if->sk_cdata.sk_tx_tag, 0, in sk_dma_alloc()
1992 if (error != 0) { in sk_dma_alloc()
2000 if ((error = bus_dmamap_create(sc_if->sk_cdata.sk_rx_tag, 0, in sk_dma_alloc()
2001 &sc_if->sk_cdata.sk_rx_sparemap)) != 0) { in sk_dma_alloc()
2006 for (i = 0; i < SK_RX_RING_CNT; i++) { in sk_dma_alloc()
2010 error = bus_dmamap_create(sc_if->sk_cdata.sk_rx_tag, 0, in sk_dma_alloc()
2012 if (error != 0) { in sk_dma_alloc()
2030 if (jumbo_disable != 0) { in sk_dma_jumbo_alloc()
2033 return (0); in sk_dma_jumbo_alloc()
2037 SK_RING_ALIGN, 0, /* algnmnt, boundary */ in sk_dma_jumbo_alloc()
2044 0, /* flags */ in sk_dma_jumbo_alloc()
2047 if (error != 0) { in sk_dma_jumbo_alloc()
2055 1, 0, /* algnmnt, boundary */ in sk_dma_jumbo_alloc()
2062 0, /* flags */ in sk_dma_jumbo_alloc()
2065 if (error != 0) { in sk_dma_jumbo_alloc()
2076 if (error != 0) { in sk_dma_jumbo_alloc()
2082 ctx.sk_busaddr = 0; in sk_dma_jumbo_alloc()
2087 if (error != 0) { in sk_dma_jumbo_alloc()
2095 if ((error = bus_dmamap_create(sc_if->sk_cdata.sk_jumbo_rx_tag, 0, in sk_dma_jumbo_alloc()
2096 &sc_if->sk_cdata.sk_jumbo_rx_sparemap)) != 0) { in sk_dma_jumbo_alloc()
2101 for (i = 0; i < SK_JUMBO_RX_RING_CNT; i++) { in sk_dma_jumbo_alloc()
2105 error = bus_dmamap_create(sc_if->sk_cdata.sk_jumbo_rx_tag, 0, in sk_dma_jumbo_alloc()
2107 if (error != 0) { in sk_dma_jumbo_alloc()
2114 return (0); in sk_dma_jumbo_alloc()
2121 return (0); in sk_dma_jumbo_alloc()
2141 sc_if->sk_rdata.sk_tx_ring_paddr = 0; in sk_dma_free()
2155 sc_if->sk_rdata.sk_rx_ring_paddr = 0; in sk_dma_free()
2161 for (i = 0; i < SK_TX_RING_CNT; i++) { in sk_dma_free()
2174 for (i = 0; i < SK_RX_RING_CNT; i++) { in sk_dma_free()
2213 sc_if->sk_rdata.sk_jumbo_rx_ring_paddr = 0; in sk_dma_jumbo_free()
2220 for (i = 0; i < SK_JUMBO_RX_RING_CNT; i++) { in sk_dma_jumbo_free()
2247 for(; m && m->m_len == 0; m = m->m_next) in sk_txcksum()
2261 for(m = m->m_next; m && m->m_len == 0; m = m->m_next) in sk_txcksum()
2277 f->sk_csum_startval = 0; in sk_txcksum()
2278 f->sk_csum_start = htole32(((offset + m->m_pkthdr.csum_data) & 0xffff) | in sk_txcksum()
2298 txd->tx_dmamap, *m_head, txsegs, &nseg, 0); in sk_encap()
2308 txd->tx_dmamap, *m_head, txsegs, &nseg, 0); in sk_encap()
2309 if (error != 0) { in sk_encap()
2314 } else if (error != 0) in sk_encap()
2316 if (nseg == 0) { in sk_encap()
2327 if ((m->m_pkthdr.csum_flags & if_gethwassist(sc_if->sk_ifp)) != 0) in sk_encap()
2332 for (i = 0; i < nseg; i++) { in sk_encap()
2337 if (i == 0) { in sk_encap()
2369 return (0); in sk_encap()
2399 for (enq = 0; !if_sendq_empty(ifp) && in sk_start_locked()
2414 if_setdrvflagbits(ifp, IFF_DRV_OACTIVE, 0); in sk_start_locked()
2426 if (enq > 0) { in sk_start_locked()
2446 if (sc_if->sk_watchdog_timer == 0 || --sc_if->sk_watchdog_timer) in sk_watchdog()
2454 if (sc_if->sk_cdata.sk_tx_cnt != 0) { in sk_watchdog()
2457 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); in sk_watchdog()
2485 return (0); in skc_shutdown()
2513 return (0); in skc_suspend()
2537 sc->sk_suspended = 0; in skc_resume()
2541 return (0); in skc_resume()
2584 csum1 = htons(csum & 0xffff); in sk_rxcksum()
2585 csum2 = htons((csum >> 16) & 0xffff); in sk_rxcksum()
2586 ipcsum = in_addword(csum1, ~csum2 & 0xffff); in sk_rxcksum()
2589 if (len > 0) { in sk_rxcksum()
2603 if (ipcsum == 0xffff) in sk_rxcksum()
2614 return (0); in sk_rxvalid()
2618 YU_RXSTAT_JABBER)) != 0 || in sk_rxvalid()
2621 return (0); in sk_rxvalid()
2646 prog = 0; in sk_rxeof()
2651 if ((sk_ctl & SK_RXCTL_OWN) != 0) in sk_rxeof()
2661 sk_rxvalid(sc, rxstat, SK_RXBYTES(sk_ctl)) == 0) { in sk_rxeof()
2669 if (sk_newbuf(sc_if, cons) != 0) { in sk_rxeof()
2678 if ((if_getcapenable(ifp) & IFCAP_RXCSUM) != 0) in sk_rxeof()
2685 if (prog > 0) { in sk_rxeof()
2712 prog = 0; in sk_jumbo_rxeof()
2718 if ((sk_ctl & SK_RXCTL_OWN) != 0) in sk_jumbo_rxeof()
2728 sk_rxvalid(sc, rxstat, SK_RXBYTES(sk_ctl)) == 0) { in sk_jumbo_rxeof()
2736 if (sk_jumbo_newbuf(sc_if, cons) != 0) { in sk_jumbo_rxeof()
2745 if ((if_getcapenable(ifp) & IFCAP_RXCSUM) != 0) in sk_jumbo_rxeof()
2752 if (prog > 0) { in sk_jumbo_rxeof()
2780 if (sc_if->sk_cdata.sk_tx_cnt <= 0) in sk_txeof()
2787 if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE); in sk_txeof()
2788 if ((sk_ctl & SK_TXCTL_LASTFRAG) == 0) in sk_txeof()
2802 sc_if->sk_watchdog_timer = sc_if->sk_cdata.sk_tx_cnt > 0 ? 5 : 0; in sk_txeof()
2831 * the link has come back up is to poll bit 0 of the GPIO in sk_tick()
2836 for (i = 0; i < 3; i++) { in sk_tick()
2896 SK_IF_WRITE_1(sc_if, 0, in sk_intr_bcom()
2898 sc_if->sk_link = 0; in sk_intr_bcom()
2901 BRGPHY_MII_IMR, 0xFF00); in sk_intr_bcom()
2905 SK_IF_WRITE_1(sc_if, 0, SK_LINKLED1_CTL, in sk_intr_bcom()
2957 status = SK_IF_READ_1(sc_if, 0, SK_GMAC_ISR); in sk_intr_yukon()
2959 if ((status & SK_GMAC_INT_RX_OVER) != 0) { in sk_intr_yukon()
2960 SK_IF_WRITE_1(sc_if, 0, SK_RXMF1_CTRL_TEST, in sk_intr_yukon()
2964 if ((status & SK_GMAC_INT_TX_UNDER) != 0) { in sk_intr_yukon()
2965 SK_IF_WRITE_1(sc_if, 0, SK_RXMF1_CTRL_TEST, in sk_intr_yukon()
2981 if (status == 0 || status == 0xffffffff || sc->sk_suspended) in sk_intr()
2992 for (; (status &= sc->sk_intrmask) != 0;) { in sk_intr()
3067 { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 }, { 0x17, 0x0013 }, in sk_init_xmac()
3068 { 0x15, 0x0404 }, { 0x17, 0x8006 }, { 0x15, 0x0132 }, { 0x17, 0x8006 }, in sk_init_xmac()
3069 { 0x15, 0x0232 }, { 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 }, in sk_init_xmac()
3070 { 0, 0 } }; in sk_init_xmac()
3078 SK_IF_WRITE_2(sc_if, 0, SK_TXF1_MACCTL, SK_TXMACCTL_XMAC_UNRESET); in sk_init_xmac()
3093 int i = 0; in sk_init_xmac()
3111 BRGPHY_MII_IMR, 0xFFF0); in sk_init_xmac()
3119 if (sk_xmac_miibus_readreg(sc_if, SK_PHYADDR_BCOM, 0x03) in sk_init_xmac()
3120 == 0x6041) { in sk_init_xmac()
3131 SK_XM_WRITE_2(sc_if, XM_PAR0, eaddr[0]); in sk_init_xmac()
3184 SK_XM_WRITE_2(sc_if, XM_IMR, 0xFFFF); in sk_init_xmac()
3249 SK_IF_WRITE_4(sc_if, 0, SK_GPHY_CTRL, SK_GPHY_RESET_SET); in sk_init_yukon()
3250 SK_IF_WRITE_4(sc_if, 0, SK_GMAC_CTRL, SK_GMAC_RESET_SET); in sk_init_yukon()
3272 SK_IF_WRITE_4(sc_if, 0, SK_GPHY_CTRL, phy | SK_GPHY_RESET_SET); in sk_init_yukon()
3274 SK_IF_WRITE_4(sc_if, 0, SK_GPHY_CTRL, phy | SK_GPHY_RESET_CLEAR); in sk_init_yukon()
3275 SK_IF_WRITE_4(sc_if, 0, SK_GMAC_CTRL, SK_GMAC_LOOP_OFF | in sk_init_yukon()
3279 SK_IF_READ_2(sc_if, 0, SK_GMAC_ISR); in sk_init_yukon()
3295 SK_YU_WRITE_2(sc_if, YUKON_TPR, YU_TPR_JAM_LEN(0x3) | in sk_init_yukon()
3296 YU_TPR_JAM_IPG(0xb) | YU_TPR_JAM2DATA_IPG(0x1a) ); in sk_init_yukon()
3299 reg = YU_SMR_DATA_BLIND(0x1c) | YU_SMR_MFL_VLAN | YU_SMR_IPG_DATA(0x1e); in sk_init_yukon()
3306 for (i = 0; i < 3; i++) in sk_init_yukon()
3310 for (i = 0; i < 3; i++) in sk_init_yukon()
3314 for (i = 0; i < 3; i++) in sk_init_yukon()
3322 SK_YU_WRITE_2(sc_if, YUKON_TIMR, 0); in sk_init_yukon()
3323 SK_YU_WRITE_2(sc_if, YUKON_RIMR, 0); in sk_init_yukon()
3324 SK_YU_WRITE_2(sc_if, YUKON_TRIMR, 0); in sk_init_yukon()
3330 SK_IF_WRITE_2(sc_if, 0, SK_RXMF1_FLUSH_MASK, v); in sk_init_yukon()
3338 SK_IF_WRITE_1(sc_if, 0, SK_RXMF1_CTRL_TEST, SK_RFCTL_RESET_CLEAR); in sk_init_yukon()
3339 SK_IF_WRITE_2(sc_if, 0, SK_RXMF1_CTRL_TEST, v); in sk_init_yukon()
3342 SK_IF_WRITE_2(sc_if, 0, SK_RXMF1_FLUSH_THRESHOLD, in sk_init_yukon()
3346 SK_IF_WRITE_1(sc_if, 0, SK_TXMF1_CTRL_TEST, SK_TFCTL_RESET_CLEAR); in sk_init_yukon()
3347 SK_IF_WRITE_2(sc_if, 0, SK_TXMF1_CTRL_TEST, SK_TFCTL_OPERATION_ON); in sk_init_yukon()
3390 SK_IF_WRITE_1(sc_if, 0, SK_LINKLED1_CTL, SK_LINKLED_ON); in sk_init_locked()
3391 SK_IF_WRITE_1(sc_if, 0, SK_LINKLED1_CTL, in sk_init_locked()
3395 SK_IF_WRITE_1(sc_if, 0, SK_RXLED1_CTL, in sk_init_locked()
3399 SK_IF_WRITE_1(sc_if, 0, SK_TXLED1_CTL, in sk_init_locked()
3420 SK_IF_WRITE_4(sc_if, 0, SK_DPT_INIT, SK_DPT_TIMER_MAX); in sk_init_locked()
3439 SK_IF_WRITE_4(sc_if, 0, SK_RXF1_CTL, SK_FIFO_UNRESET); in sk_init_locked()
3440 SK_IF_WRITE_4(sc_if, 0, SK_RXF1_END, SK_FIFO_END); in sk_init_locked()
3441 SK_IF_WRITE_4(sc_if, 0, SK_RXF1_CTL, SK_FIFO_ON); in sk_init_locked()
3443 SK_IF_WRITE_4(sc_if, 0, SK_TXF1_CTL, SK_FIFO_UNRESET); in sk_init_locked()
3444 SK_IF_WRITE_4(sc_if, 0, SK_TXF1_END, SK_FIFO_END); in sk_init_locked()
3445 SK_IF_WRITE_4(sc_if, 0, SK_TXF1_CTL, SK_FIFO_ON); in sk_init_locked()
3449 SK_IF_WRITE_1(sc_if, 0, SK_TXAR1_COUNTERCTL, in sk_init_locked()
3453 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_CTLTST, SK_RBCTL_UNRESET); in sk_init_locked()
3454 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_START, sc_if->sk_rx_ramstart); in sk_init_locked()
3455 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_WR_PTR, sc_if->sk_rx_ramstart); in sk_init_locked()
3456 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_RD_PTR, sc_if->sk_rx_ramstart); in sk_init_locked()
3457 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_END, sc_if->sk_rx_ramend); in sk_init_locked()
3458 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_CTLTST, SK_RBCTL_ON); in sk_init_locked()
3469 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_BMU_CSR, SK_RXBMU_ONLINE); in sk_init_locked()
3471 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_CURADDR_LO, in sk_init_locked()
3472 SK_ADDR_LO(SK_JUMBO_RX_RING_ADDR(sc_if, 0))); in sk_init_locked()
3473 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_CURADDR_HI, in sk_init_locked()
3474 SK_ADDR_HI(SK_JUMBO_RX_RING_ADDR(sc_if, 0))); in sk_init_locked()
3476 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_CURADDR_LO, in sk_init_locked()
3477 SK_ADDR_LO(SK_RX_RING_ADDR(sc_if, 0))); in sk_init_locked()
3478 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_CURADDR_HI, in sk_init_locked()
3479 SK_ADDR_HI(SK_RX_RING_ADDR(sc_if, 0))); in sk_init_locked()
3484 SK_ADDR_LO(SK_TX_RING_ADDR(sc_if, 0))); in sk_init_locked()
3486 SK_ADDR_HI(SK_TX_RING_ADDR(sc_if, 0))); in sk_init_locked()
3493 if (error != 0) { in sk_init_locked()
3524 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_BMU_CSR, SK_RXBMU_RX_START); in sk_init_locked()
3537 #if 0 in sk_init_locked()
3545 SK_IF_WRITE_4(sc_if, 0, SK_DPT_TIMER_CTRL, SK_DPT_TCTL_START); in sk_init_locked()
3549 if_setdrvflagbits(ifp, IFF_DRV_RUNNING, 0); in sk_init_locked()
3550 if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE); in sk_init_locked()
3584 SK_IF_WRITE_4(sc_if, 0, SK_DPT_TIMER_CTRL, SK_DPT_TCTL_STOP); in sk_stop()
3587 for (i = 0; i < SK_TIMEOUT; i++) { in sk_stop()
3589 if ((val & SK_TXBMU_TX_STOP) == 0) in sk_stop()
3597 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_BMU_CSR, SK_RXBMU_RX_STOP); in sk_stop()
3598 for (i = 0; i < SK_TIMEOUT; i++) { in sk_stop()
3599 val = SK_IF_READ_4(sc_if, 0, SK_RXQ1_BMU_CSR); in sk_stop()
3600 if ((val & SK_RXBMU_RX_STOP) == 0) in sk_stop()
3625 SK_IF_WRITE_2(sc_if, 0, SK_TXF1_MACCTL, SK_TXMACCTL_XMAC_RESET); in sk_stop()
3626 SK_IF_WRITE_4(sc_if, 0, SK_RXF1_CTL, SK_FIFO_RESET); in sk_stop()
3631 SK_IF_WRITE_1(sc_if,0, SK_RXMF1_CTRL_TEST, SK_RFCTL_RESET_SET); in sk_stop()
3632 SK_IF_WRITE_1(sc_if,0, SK_TXMF1_CTRL_TEST, SK_TFCTL_RESET_SET); in sk_stop()
3635 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_BMU_CSR, SK_RXBMU_OFFLINE); in sk_stop()
3636 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_CTLTST, SK_RBCTL_RESET|SK_RBCTL_OFF); in sk_stop()
3639 SK_IF_WRITE_1(sc_if, 0, SK_TXAR1_COUNTERCTL, SK_TXARCTL_OFF); in sk_stop()
3640 SK_IF_WRITE_1(sc_if, 0, SK_RXLED1_CTL, SK_RXLEDCTL_COUNTER_STOP); in sk_stop()
3641 SK_IF_WRITE_1(sc_if, 0, SK_TXLED1_CTL, SK_RXLEDCTL_COUNTER_STOP); in sk_stop()
3642 SK_IF_WRITE_1(sc_if, 0, SK_LINKLED1_CTL, SK_LINKLED_OFF); in sk_stop()
3643 SK_IF_WRITE_1(sc_if, 0, SK_LINKLED1_CTL, SK_LINKLED_LINKSYNC_OFF); in sk_stop()
3653 SK_XM_WRITE_2(sc_if, XM_IMR, 0xFFFF); in sk_stop()
3656 for (i = 0; i < SK_RX_RING_CNT; i++) { in sk_stop()
3667 for (i = 0; i < SK_JUMBO_RX_RING_CNT; i++) { in sk_stop()
3678 for (i = 0; i < SK_TX_RING_CNT; i++) { in sk_stop()
3690 if_setdrvflagbits(ifp, 0, (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)); in sk_stop()
3703 error = sysctl_handle_int(oidp, &value, 0, req); in sysctl_int_range()
3709 return (0); in sysctl_int_range()