464 	__in_opt				efsys_mem_t *esmp,  in siena_phy_decode_stats()  argument
472 	SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, OUI);  in siena_phy_decode_stats()
473 	SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PMA_PMD_LINK_UP);  in siena_phy_decode_stats()
474 	SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PMA_PMD_RX_FAULT);  in siena_phy_decode_stats()
475 	SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PMA_PMD_TX_FAULT);  in siena_phy_decode_stats()
482 		if (stat != NULL && esmp != NULL && !EFSYS_MEM_IS_NULL(esmp)) {  in siena_phy_decode_stats()
485 			EFSYS_MEM_READD(esmp, 4 * MC_CMD_PMA_PMD_SIGNAL,  in siena_phy_decode_stats()
495 	SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PMA_PMD_SNR_A,  in siena_phy_decode_stats()
497 	SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PMA_PMD_SNR_B,  in siena_phy_decode_stats()
499 	SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PMA_PMD_SNR_C,  in siena_phy_decode_stats()
501 	SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PMA_PMD_SNR_D,  in siena_phy_decode_stats()
504 	SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PCS_LINK_UP);  in siena_phy_decode_stats()
505 	SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PCS_RX_FAULT);  in siena_phy_decode_stats()
506 	SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PCS_TX_FAULT);  in siena_phy_decode_stats()
507 	SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PCS_BER);  in siena_phy_decode_stats()
508 	SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PCS_BLOCK_ERRORS);  in siena_phy_decode_stats()
510 	SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PHYXS_LINK_UP,  in siena_phy_decode_stats()
512 	SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PHYXS_RX_FAULT,  in siena_phy_decode_stats()
514 	SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PHYXS_TX_FAULT,  in siena_phy_decode_stats()
516 	SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PHYXS_ALIGN,  in siena_phy_decode_stats()
524 		if (stat != NULL && !EFSYS_MEM_IS_NULL(esmp)) {  in siena_phy_decode_stats()
527 			EFSYS_MEM_READD(esmp, 4 * MC_CMD_PHYXS_SYNC, &dword);  in siena_phy_decode_stats()
536 	SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, AN_LINK_UP);  in siena_phy_decode_stats()
537 	SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, AN_COMPLETE);  in siena_phy_decode_stats()
539 	SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_CL22_LINK_UP,  in siena_phy_decode_stats()
549 	__in					efsys_mem_t *esmp,  in siena_phy_stats_update()  argument
560 	if ((esmp == NULL) || (EFSYS_MEM_SIZE(esmp) < EFX_PHY_STATS_SIZE)) {  in siena_phy_stats_update()
572 			    EFSYS_MEM_ADDR(esmp) & 0xffffffff);  in siena_phy_stats_update()
574 			    EFSYS_MEM_ADDR(esmp) >> 32);  in siena_phy_stats_update()
584 	siena_phy_decode_stats(enp, vmask, esmp, &smask, stat);  in siena_phy_stats_update()