Lines Matching +full:0 +full:x0003ffff
60 if (req.emr_rc != 0) { in siena_nic_get_partn_mask()
72 return (0); in siena_nic_get_partn_mask()
104 &capabilities, mac_addr)) != 0) in siena_board_cfg()
167 if (rc != 0) { in siena_board_cfg()
188 encp->enc_fw_assisted_tso_v2_n_contexts = 0; in siena_board_cfg()
205 encp->enc_filter_action_mark_max = 0; in siena_board_cfg()
207 return (0); in siena_board_cfg()
227 if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0) in siena_phy_cfg()
236 return (0); in siena_phy_cfg()
244 #define SIENA_BIU_MAGIC0 0x01234567
245 #define SIENA_BIU_MAGIC1 0xfedcba98
255 * Write magic values to scratch registers 0 and 1, then in siena_nic_biu_test()
261 EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE); in siena_nic_biu_test()
266 EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE); in siena_nic_biu_test()
284 EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE); in siena_nic_biu_test()
289 EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE); in siena_nic_biu_test()
301 return (0); in siena_nic_biu_test()
329 if ((rc = siena_nic_biu_test(enp)) != 0) in siena_nic_probe()
334 FRF_AZ_ADR_REGION0, 0, in siena_nic_probe()
341 if ((rc = efx_mcdi_read_assertion(enp)) != 0) in siena_nic_probe()
345 if ((rc = efx_mcdi_exit_assertion_handler(enp)) != 0) in siena_nic_probe()
349 if ((rc = efx_mcdi_drv_attach(enp, B_TRUE)) != 0) in siena_nic_probe()
352 if ((rc = siena_board_cfg(enp)) != 0) in siena_nic_probe()
355 if ((rc = siena_phy_cfg(enp)) != 0) in siena_nic_probe()
359 if ((rc = siena_nic_reset(enp)) != 0) in siena_nic_probe()
361 if ((rc = siena_phy_get_link(enp, &sls)) != 0) in siena_nic_probe()
367 if ((rc = siena_nic_get_partn_mask(enp, &mask)) != 0) in siena_nic_probe()
374 if ((rc = efx_mcdi_mac_stats_clear(enp)) != 0) in siena_nic_probe()
379 if ((rc = efx_mcdi_get_loopback_modes(enp)) != 0) in siena_nic_probe()
384 if ((rc = mcdi_mon_cfg_build(enp)) != 0) in siena_nic_probe()
390 return (0); in siena_nic_probe()
438 if ((rc = efx_mcdi_read_assertion(enp)) != 0) in siena_nic_reset()
440 if ((rc = efx_mcdi_exit_assertion_handler(enp)) != 0) in siena_nic_reset()
447 EFX_STATIC_ASSERT(MC_CMD_ENTITY_RESET_OUT_LEN == 0); in siena_nic_reset()
451 req.emr_in_length = 0; in siena_nic_reset()
453 req.emr_out_length = 0; in siena_nic_reset()
457 if (req.emr_rc != 0) { in siena_nic_reset()
462 return (0); in siena_nic_reset()
471 return (0); in siena_nic_reset()
490 EFX_SET_OWORD_FIELD(oword, FRF_CZ_RX_FILTER_ALL_VLAN_ETHERTYPES, 0); in siena_nic_rx_cfg()
513 if ((rc = efx_mcdi_log_ctrl(enp)) != 0) in siena_nic_init()
525 if ((rc = siena_phy_reconfigure(enp)) != 0) in siena_nic_init()
530 return (0); in siena_nic_init()
560 { FR_AZ_ADR_REGION_REG_OFST, 0, 1 },
561 { FR_CZ_USR_EV_CFG_OFST, 0, 1 },
562 { FR_AZ_RX_CFG_REG_OFST, 0, 1 },
563 { FR_AZ_TX_CFG_REG_OFST, 0, 1 },
564 { FR_AZ_TX_RESERVED_REG_OFST, 0, 1 },
565 { FR_AZ_SRM_TX_DC_CFG_REG_OFST, 0, 1 },
566 { FR_AZ_RX_DC_CFG_REG_OFST, 0, 1 },
567 { FR_AZ_RX_DC_PF_WM_REG_OFST, 0, 1 },
568 { FR_AZ_DP_CTRL_REG_OFST, 0, 1 },
569 { FR_BZ_RX_RSS_TKEY_REG_OFST, 0, 1},
570 { FR_CZ_RX_RSS_IPV6_REG1_OFST, 0, 1},
571 { FR_CZ_RX_RSS_IPV6_REG2_OFST, 0, 1},
572 { FR_CZ_RX_RSS_IPV6_REG3_OFST, 0, 1}
576 0x0003FFFF, 0x0003FFFF, 0x0003FFFF, 0x0003FFFF,
577 0x000103FF, 0x00000000, 0x00000000, 0x00000000,
578 0xFFFFFFFE, 0xFFFFFFFF, 0x0003FFFF, 0x00000000,
579 0x7FFF0037, 0xFFFF8000, 0xFFFFFFFF, 0x03FFFFFF,
580 0xFFFEFE80, 0x1FFFFFFF, 0x020000FE, 0x007FFFFF,
581 0x001FFFFF, 0x00000000, 0x00000000, 0x00000000,
582 0x00000003, 0x00000000, 0x00000000, 0x00000000,
583 0x000003FF, 0x00000000, 0x00000000, 0x00000000,
584 0x00000FFF, 0x00000000, 0x00000000, 0x00000000,
585 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
586 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
587 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
588 0xFFFFFFFF, 0xFFFFFFFF, 0x00000007, 0x00000000
608 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x000003FF,
609 0xFFFF0FFF, 0xFFFFFFFF, 0x00000E7F, 0x00000000,
610 0xFFFFFFFE, 0x0FFFFFFF, 0x01800000, 0x00000000,
611 0xFFFFFFFE, 0x0FFFFFFF, 0x0C000000, 0x00000000,
612 0x3FFFFFFF, 0x00000000, 0x00000000, 0x00000000,
613 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x000013FF,
614 0xFFFF07FF, 0xFFFFFFFF, 0x0000007F, 0x00000000,
629 while (count > 0) { in siena_nic_test_registers()
636 for (bit = 0; bit < 128; bit++) { in siena_nic_test_registers()
681 return (0); in siena_nic_test_registers()
711 while (count > 0) { in siena_nic_test_tables()
714 for (index = 0; index < rsp->rows; ++index) { in siena_nic_test_tables()
715 func(2 * index + 0, B_FALSE, ®.eo_qword[0]); in siena_nic_test_tables()
725 for (index = 0; index < rsp->rows; ++index) { in siena_nic_test_tables()
726 func(2 * index + 0, B_FALSE, ®.eo_qword[0]); in siena_nic_test_tables()
742 return (0); in siena_nic_test_tables()
766 for (count = 0; count < nitems; ++count) { in siena_nic_register_test()
768 rsp->mask.eo_u32[0] = *dwordp++; in siena_nic_register_test()
780 for (count = 0; count < nitems; ++count) { in siena_nic_register_test()
782 rsp->mask.eo_u32[0] = *dwordp++; in siena_nic_register_test()
789 EFX_ARRAY_SIZE(__siena_registers))) != 0) in siena_nic_register_test()
794 EFX_ARRAY_SIZE(__siena_tables))) != 0) in siena_nic_register_test()
799 EFX_ARRAY_SIZE(__siena_tables))) != 0) in siena_nic_register_test()
803 EFX_PATTERN_BIT_SWEEP, EFX_ARRAY_SIZE(__siena_tables))) != 0) in siena_nic_register_test()
806 return (0); in siena_nic_register_test()