1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
10  * 1. Redistributions of source code must retain the above copyright
64 #define	PCI_SLOT_INFO_SLOTS(x)		(((x >> 4) & 7) + 1)
109 	{ 0x16bc14e4,	0xffff,	"Broadcom BCM577xx SDXC/MMC Card Reader",
117 	{ 0x0f158086,	0xffff,	"Intel Bay Trail SDXC Controller",
132 	{ 0x22948086,	0xffff,	"Intel Braswell eMMC 4.5.1 Controller",
139 	{ 0x22968086,	0xffff,	"Intel Braswell SDXC Controller",
142 	{ 0x5aca8086,	0xffff,	"Intel Apollo Lake SDXC Controller",
169 static int sdhci_enable_msi = 1;
178 	bus_barrier(sc->mem_res[slot->num], 0, 0xFF,  in sdhci_pci_read_1()
180 	return bus_read_1(sc->mem_res[slot->num], off);  in sdhci_pci_read_1()
189 	bus_barrier(sc->mem_res[slot->num], 0, 0xFF,  in sdhci_pci_write_1()
191 	bus_write_1(sc->mem_res[slot->num], off, val);  in sdhci_pci_write_1()
199 	bus_barrier(sc->mem_res[slot->num], 0, 0xFF,  in sdhci_pci_read_2()
201 	return bus_read_2(sc->mem_res[slot->num], off);  in sdhci_pci_read_2()
210 	bus_barrier(sc->mem_res[slot->num], 0, 0xFF,  in sdhci_pci_write_2()
212 	bus_write_2(sc->mem_res[slot->num], off, val);  in sdhci_pci_write_2()
220 	bus_barrier(sc->mem_res[slot->num], 0, 0xFF,  in sdhci_pci_read_4()
222 	return bus_read_4(sc->mem_res[slot->num], off);  in sdhci_pci_read_4()
231 	bus_barrier(sc->mem_res[slot->num], 0, 0xFF,  in sdhci_pci_write_4()
233 	bus_write_4(sc->mem_res[slot->num], off, val);  in sdhci_pci_write_4()
242 	bus_read_multi_stream_4(sc->mem_res[slot->num], off, data, count);  in sdhci_pci_read_multi_4()
251 	bus_write_multi_stream_4(sc->mem_res[slot->num], off, data, count);  in sdhci_pci_write_multi_4()
265 	pci_write_config(dev, SDHC_PCI_MODE_KEY, 0xfc, 1);  in sdhci_lower_frequency()
266 	sc->cfg_mode = pci_read_config(dev, SDHC_PCI_MODE, 1);  in sdhci_lower_frequency()
267 	pci_write_config(dev, SDHC_PCI_MODE, SDHC_PCI_MODE_SD20, 1);  in sdhci_lower_frequency()
268 	pci_write_config(dev, SDHC_PCI_MODE_KEY, 0x00, 1);  in sdhci_lower_frequency()
274 	pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x01, 1);  in sdhci_lower_frequency()
275 	sc->cfg_freq = pci_read_config(dev, SDHC_PCI_BASE_FREQ, 1);  in sdhci_lower_frequency()
276 	pci_write_config(dev, SDHC_PCI_BASE_FREQ, 50, 1);  in sdhci_lower_frequency()
277 	pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x00, 1);  in sdhci_lower_frequency()
286 	pci_write_config(dev, SDHC_PCI_MODE_KEY, 0xfc, 1);  in sdhci_restore_frequency()
287 	pci_write_config(dev, SDHC_PCI_MODE, sc->cfg_mode, 1);  in sdhci_restore_frequency()
288 	pci_write_config(dev, SDHC_PCI_MODE_KEY, 0x00, 1);  in sdhci_restore_frequency()
291 	pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x01, 1);  in sdhci_restore_frequency()
292 	pci_write_config(dev, SDHC_PCI_BASE_FREQ, sc->cfg_freq, 1);  in sdhci_restore_frequency()
293 	pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x00, 1);  in sdhci_restore_frequency()
346 			sc->quirks = sdhci_devices[i].quirks;  in sdhci_pci_attach()
350 	sc->quirks &= ~sdhci_quirk_clear;  in sdhci_pci_attach()
351 	sc->quirks |= sdhci_quirk_set;  in sdhci_pci_attach()
354 	if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY)  in sdhci_pci_attach()
357 	slots = pci_read_config(dev, PCI_SLOT_INFO, 1);  in sdhci_pci_attach()
366 	i = 1;  in sdhci_pci_attach()
369 		rid = 1;  in sdhci_pci_attach()
370 	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,  in sdhci_pci_attach()
372 	if (sc->irq_res == NULL) {  in sdhci_pci_attach()
379 		slot = &sc->slots[sc->num_slots];  in sdhci_pci_attach()
383 		sc->mem_res[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,  in sdhci_pci_attach()
385 		if (sc->mem_res[i] == NULL) {  in sdhci_pci_attach()
391 		slot->quirks = sc->quirks;  in sdhci_pci_attach()
396 		sc->num_slots++;  in sdhci_pci_attach()
398 	device_printf(dev, "%d slot(s) allocated\n", sc->num_slots);  in sdhci_pci_attach()
400 	err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,  in sdhci_pci_attach()
401 	    NULL, sdhci_pci_intr, sc, &sc->intrhand);  in sdhci_pci_attach()
406 	for (i = 0; i < sc->num_slots; i++) {  in sdhci_pci_attach()
407 		sdhci_start_slot(&sc->slots[i]);  in sdhci_pci_attach()
419 	bus_teardown_intr(dev, sc->irq_res, sc->intrhand);  in sdhci_pci_detach()
421 	    rman_get_rid(sc->irq_res), sc->irq_res);  in sdhci_pci_detach()
424 	for (i = 0; i < sc->num_slots; i++) {  in sdhci_pci_detach()
425 		sdhci_cleanup_slot(&sc->slots[i]);  in sdhci_pci_detach()
427 		    rman_get_rid(sc->mem_res[i]), sc->mem_res[i]);  in sdhci_pci_detach()
429 	if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY)  in sdhci_pci_detach()
439 	if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY)  in sdhci_pci_shutdown()
453 	for (i = 0; i < sc->num_slots; i++)  in sdhci_pci_suspend()
454 		sdhci_generic_suspend(&sc->slots[i]);  in sdhci_pci_suspend()
464 	for (i = 0; i < sc->num_slots; i++)  in sdhci_pci_resume()
465 		sdhci_generic_resume(&sc->slots[i]);  in sdhci_pci_resume()
469 	if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY)  in sdhci_pci_resume()
480 	for (i = 0; i < sc->num_slots; i++)  in sdhci_pci_intr()
481 		sdhci_generic_intr(&sc->slots[i]);  in sdhci_pci_intr()