342 	    (sc->slot.host.ios.timing == bus_timing_mmc_hs400 ||  in fsl_sdhc_fdt_set_clock()
602 	struct mmc_ios *ios;  in sdhci_fsl_fdt_update_ios()  local
611 	ios = &slot->host.ios;  in sdhci_fsl_fdt_update_ios()
613 	switch (ios->power_mode) {  in sdhci_fsl_fdt_update_ios()
707 	switch (slot->host.ios.vccq) {  in sdhci_fsl_fdt_switch_vccq()
727 		    slot->host.ios.vccq);  in sdhci_fsl_fdt_switch_vccq()
1075 			slot->host.ios.clock = 0;  in sdhci_fsl_fdt_write_ivar()
1082 		slot->host.ios.clock = sc->baseclk_hz / (prescale * div);  in sdhci_fsl_fdt_write_ivar()
1201 	if (sc->slot.host.ios.timing == bus_timing_uhs_sdr50 &&  in sdhci_fsl_fdt_tune()
1318 	if (slot->host.ios.timing == bus_timing_mmc_hs400)  in sdhci_fsl_fdt_retune()
1472 	const struct mmc_ios *ios;  in sdhci_fsl_fdt_set_uhs_timing()  local
1476 	ios = &slot->host.ios;  in sdhci_fsl_fdt_set_uhs_timing()
1486 	if (slot->host.ios.timing == bus_timing_mmc_hs400 &&  in sdhci_fsl_fdt_set_uhs_timing()
1487 	    ios->clock > SD_SDR50_MAX)  in sdhci_fsl_fdt_set_uhs_timing()
1489 	else if (slot->host.ios.timing < bus_timing_mmc_hs400) {  in sdhci_fsl_fdt_set_uhs_timing()
1499 		if (ios->clock > SD_SDR50_MAX)  in sdhci_fsl_fdt_set_uhs_timing()
1501 		else if (ios->clock > SD_SDR25_MAX)  in sdhci_fsl_fdt_set_uhs_timing()
1503 		else if (ios->clock > SD_SDR12_MAX) {  in sdhci_fsl_fdt_set_uhs_timing()
1504 			if (ios->timing == bus_timing_uhs_ddr50 ||  in sdhci_fsl_fdt_set_uhs_timing()
1505 			    ios->timing == bus_timing_mmc_ddr52)  in sdhci_fsl_fdt_set_uhs_timing()
1509 		} else if (ios->clock > SD_MMC_CARD_ID_FREQUENCY)  in sdhci_fsl_fdt_set_uhs_timing()