195 	struct sdhci_slot			slot;  member
316 fsl_sdhc_fdt_set_clock(struct sdhci_fsl_fdt_softc *sc, struct sdhci_slot *slot,  in fsl_sdhc_fdt_set_clock()  argument
333 	SDHCI_FSL_FDT_CLK_DIV(sc, sc->baseclk_hz, slot->clock, prescale, div);  in fsl_sdhc_fdt_set_clock()
342 	    (sc->slot.host.ios.timing == bus_timing_mmc_hs400 ||  in fsl_sdhc_fdt_set_clock()
362 		    slot->clock, sc->baseclk_hz / (prescale * div),  in fsl_sdhc_fdt_set_clock()
376 sdhci_fsl_fdt_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off)  in sdhci_fsl_fdt_read_1()  argument
403 sdhci_fsl_fdt_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off)  in sdhci_fsl_fdt_read_2()  argument
433 sdhci_fsl_fdt_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off)  in sdhci_fsl_fdt_read_4()  argument
458 sdhci_fsl_fdt_read_multi_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,  in sdhci_fsl_fdt_read_multi_4()  argument
468 sdhci_fsl_fdt_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off,  in sdhci_fsl_fdt_write_1()  argument
506 sdhci_fsl_fdt_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off,  in sdhci_fsl_fdt_write_2()  argument
516 		fsl_sdhc_fdt_set_clock(sc, slot, val);  in sdhci_fsl_fdt_write_2()
549 sdhci_fsl_fdt_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,  in sdhci_fsl_fdt_write_4()  argument
578 sdhci_fsl_fdt_write_multi_4(device_t dev, struct sdhci_slot *slot,  in sdhci_fsl_fdt_write_multi_4()  argument
593 	sdhci_generic_intr(&sc->slot);  in sdhci_fsl_fdt_irq()
603 	struct sdhci_slot *slot;  in sdhci_fsl_fdt_update_ios()  local
610 	slot = device_get_ivars(reqdev);  in sdhci_fsl_fdt_update_ios()
611 	ios = &slot->host.ios;  in sdhci_fsl_fdt_update_ios()
697 	struct sdhci_slot *slot;  in sdhci_fsl_fdt_switch_vccq()  local
703 	slot = device_get_ivars(reqdev);  in sdhci_fsl_fdt_switch_vccq()
707 	switch (slot->host.ios.vccq) {  in sdhci_fsl_fdt_switch_vccq()
727 		    slot->host.ios.vccq);  in sdhci_fsl_fdt_switch_vccq()
762 sdhci_fsl_fdt_get_card_present(device_t dev, struct sdhci_slot *slot)  in sdhci_fsl_fdt_get_card_present()  argument
819 	mmc_fdt_parse(dev, node, &sc->fdt_helper, &sc->slot.host);  in sdhci_fsl_fdt_of_parse()
821 	sc->slot.quirks |= SDHCI_QUIRK_MISSING_CAPS;  in sdhci_fsl_fdt_of_parse()
822 	sc->slot.caps = sdhci_fsl_fdt_read_4(dev, &sc->slot,  in sdhci_fsl_fdt_of_parse()
824 	sc->slot.caps2 = sdhci_fsl_fdt_read_4(dev, &sc->slot,  in sdhci_fsl_fdt_of_parse()
838 	    (vdd_mask != (sc->slot.caps & SDHCI_FSL_CAN_VDD_MASK))) {  in sdhci_fsl_fdt_of_parse()
839 		sc->slot.caps &= ~(SDHCI_FSL_CAN_VDD_MASK);  in sdhci_fsl_fdt_of_parse()
840 		sc->slot.caps |= vdd_mask;  in sdhci_fsl_fdt_of_parse()
880 	host = &sc->slot.host;  in sdhci_fsl_fdt_attach()
893 	sc->slot.quirks = sc->soc_data->quirks;  in sdhci_fsl_fdt_attach()
973 	sc->slot.max_clk = sc->maxclk_hz;  in sdhci_fsl_fdt_attach()
974 	sc->gpio = sdhci_fdt_gpio_setup(dev, &sc->slot);  in sdhci_fsl_fdt_attach()
992 	ret = sdhci_init_slot(dev, &sc->slot, 0);  in sdhci_fsl_fdt_attach()
996 	sdhci_start_slot(&sc->slot);  in sdhci_fsl_fdt_attach()
1019 		sdhci_cleanup_slot(&sc->slot);  in sdhci_fsl_fdt_detach()
1050 	struct sdhci_slot *slot = device_get_ivars(child);  in sdhci_fsl_fdt_read_ivar()  local
1052 	if (which == MMCBR_IVAR_MAX_DATA && (slot->opt & SDHCI_HAVE_DMA)) {  in sdhci_fsl_fdt_read_ivar()
1058 		*result = howmany(slot->sdma_bbufsz, 512);  in sdhci_fsl_fdt_read_ivar()
1069 	struct sdhci_slot *slot = device_get_ivars(child);  in sdhci_fsl_fdt_write_ivar()  local
1075 			slot->host.ios.clock = 0;  in sdhci_fsl_fdt_write_ivar()
1082 		slot->host.ios.clock = sc->baseclk_hz / (prescale * div);  in sdhci_fsl_fdt_write_ivar()
1091 sdhci_fsl_fdt_reset(device_t dev, struct sdhci_slot *slot, uint8_t mask)  in sdhci_fsl_fdt_reset()  argument
1096 	sdhci_generic_reset(dev, slot, mask);  in sdhci_fsl_fdt_reset()
1104 	if (slot->version >= SDHCI_SPEC_300) {  in sdhci_fsl_fdt_reset()
1195 	struct sdhci_slot *slot;  in sdhci_fsl_fdt_tune()  local
1199 	slot = device_get_ivars(child);  in sdhci_fsl_fdt_tune()
1201 	if (sc->slot.host.ios.timing == bus_timing_uhs_sdr50 &&  in sdhci_fsl_fdt_tune()
1202 	    !(slot->opt & SDHCI_SDR50_NEEDS_TUNING))  in sdhci_fsl_fdt_tune()
1211 	clk_divider = sc->baseclk_hz / slot->clock;  in sdhci_fsl_fdt_tune()
1219 	fsl_sdhc_fdt_set_clock(sc, slot, sc->sdclk_bits);  in sdhci_fsl_fdt_tune()
1253 	fsl_sdhc_fdt_set_clock(sc, slot, SDHCI_CLOCK_CARD_EN | sc->sdclk_bits);  in sdhci_fsl_fdt_tune()
1308 	struct sdhci_slot *slot;  in sdhci_fsl_fdt_retune()  local
1311 	slot = device_get_ivars(child);  in sdhci_fsl_fdt_retune()
1314 	if (!(slot->opt & SDHCI_TUNING_ENABLED))  in sdhci_fsl_fdt_retune()
1318 	if (slot->host.ios.timing == bus_timing_mmc_hs400)  in sdhci_fsl_fdt_retune()
1354 	fsl_sdhc_fdt_set_clock(sc, &sc->slot, sc->sdclk_bits);  in sdhci_fsl_disable_hs400_mode()
1365 	fsl_sdhc_fdt_set_clock(sc, &sc->slot, SDHCI_CLOCK_CARD_EN |  in sdhci_fsl_disable_hs400_mode()
1387 sdhci_fsl_enable_hs400_mode(device_t dev, struct sdhci_slot *slot,  in sdhci_fsl_enable_hs400_mode()  argument
1394 	fsl_sdhc_fdt_set_clock(sc, slot, sc->sdclk_bits);  in sdhci_fsl_enable_hs400_mode()
1409 	fsl_sdhc_fdt_set_clock(sc, slot, SDHCI_CLOCK_CARD_EN |  in sdhci_fsl_enable_hs400_mode()
1440 	fsl_sdhc_fdt_set_clock(sc, slot, sc->sdclk_bits);  in sdhci_fsl_enable_hs400_mode()
1458 	fsl_sdhc_fdt_set_clock(sc, slot, SDHCI_CLOCK_CARD_EN |  in sdhci_fsl_enable_hs400_mode()
1469 sdhci_fsl_fdt_set_uhs_timing(device_t dev, struct sdhci_slot *slot)  in sdhci_fsl_fdt_set_uhs_timing()  argument
1476 	ios = &slot->host.ios;  in sdhci_fsl_fdt_set_uhs_timing()
1486 	if (slot->host.ios.timing == bus_timing_mmc_hs400 &&  in sdhci_fsl_fdt_set_uhs_timing()
1488 		sdhci_fsl_enable_hs400_mode(dev, slot, sc);  in sdhci_fsl_fdt_set_uhs_timing()
1489 	else if (slot->host.ios.timing < bus_timing_mmc_hs400) {  in sdhci_fsl_fdt_set_uhs_timing()