Lines Matching full:esdhc
29 /* eSDHC controller driver for NXP QorIQ Layerscape SoCs. */
250 {"fsl,ls1012a-esdhc", (uintptr_t)&sdhci_fsl_fdt_ls1012a_soc_data},
251 {"fsl,ls1028a-esdhc", (uintptr_t)&sdhci_fsl_fdt_ls1028a_soc_data},
252 {"fsl,ls1046a-esdhc", (uintptr_t)&sdhci_fsl_fdt_ls1046a_soc_data},
253 {"fsl,esdhc", (uintptr_t)&sdhci_fsl_fdt_gen_data},
421 * eSDHC hardware manages only a single slot. in sdhci_fsl_fdt_read_2()
519 * eSDHC hardware combines command and mode into a single in sdhci_fsl_fdt_write_2()
561 * eSDHC hardware lacks support for the SDMA buffer boundary in sdhci_fsl_fdt_write_4()
935 /* Figure out eSDHC block endianness before we touch any HW regs. */ in sdhci_fsl_fdt_attach()
954 * If the eSDHC block is connected over a big-endian bus, the data in sdhci_fsl_fdt_attach()
1042 device_set_desc(dev, "NXP QorIQ Layerscape eSDHC controller"); in sdhci_fsl_fdt_probe()
1233 /* Wait for ESDHC[FAF] to be cleared by hardware. */ in sdhci_fsl_fdt_tune()
1243 * "eSDHC takes care of the re-tuning during data transfer in sdhci_fsl_fdt_tune()