Lines Matching full:ios

342 	    (sc->slot.host.ios.timing == bus_timing_mmc_hs400 ||  in fsl_sdhc_fdt_set_clock()
602 struct mmc_ios *ios; in sdhci_fsl_fdt_update_ios() local
611 ios = &slot->host.ios; in sdhci_fsl_fdt_update_ios()
613 switch (ios->power_mode) { in sdhci_fsl_fdt_update_ios()
707 switch (slot->host.ios.vccq) { in sdhci_fsl_fdt_switch_vccq()
727 slot->host.ios.vccq); in sdhci_fsl_fdt_switch_vccq()
1074 slot->host.ios.clock = 0; in sdhci_fsl_fdt_write_ivar()
1081 slot->host.ios.clock = sc->baseclk_hz / (prescale * div); in sdhci_fsl_fdt_write_ivar()
1200 if (sc->slot.host.ios.timing == bus_timing_uhs_sdr50 && in sdhci_fsl_fdt_tune()
1317 if (slot->host.ios.timing == bus_timing_mmc_hs400) in sdhci_fsl_fdt_retune()
1471 const struct mmc_ios *ios; in sdhci_fsl_fdt_set_uhs_timing() local
1475 ios = &slot->host.ios; in sdhci_fsl_fdt_set_uhs_timing()
1485 if (slot->host.ios.timing == bus_timing_mmc_hs400 && in sdhci_fsl_fdt_set_uhs_timing()
1486 ios->clock > SD_SDR50_MAX) in sdhci_fsl_fdt_set_uhs_timing()
1488 else if (slot->host.ios.timing < bus_timing_mmc_hs400) { in sdhci_fsl_fdt_set_uhs_timing()
1498 if (ios->clock > SD_SDR50_MAX) in sdhci_fsl_fdt_set_uhs_timing()
1500 else if (ios->clock > SD_SDR25_MAX) in sdhci_fsl_fdt_set_uhs_timing()
1502 else if (ios->clock > SD_SDR12_MAX) { in sdhci_fsl_fdt_set_uhs_timing()
1503 if (ios->timing == bus_timing_uhs_ddr50 || in sdhci_fsl_fdt_set_uhs_timing()
1504 ios->timing == bus_timing_mmc_ddr52) in sdhci_fsl_fdt_set_uhs_timing()
1508 } else if (ios->clock > SD_MMC_CARD_ID_FREQUENCY) in sdhci_fsl_fdt_set_uhs_timing()