Lines Matching full:slot
81 #define RD1(slot, off) SDHCI_READ_1((slot)->bus, (slot), (off)) argument
82 #define RD2(slot, off) SDHCI_READ_2((slot)->bus, (slot), (off)) argument
83 #define RD4(slot, off) SDHCI_READ_4((slot)->bus, (slot), (off)) argument
84 #define RD_MULTI_4(slot, off, ptr, count) \ argument
85 SDHCI_READ_MULTI_4((slot)->bus, (slot), (off), (ptr), (count))
87 #define WR1(slot, off, val) SDHCI_WRITE_1((slot)->bus, (slot), (off), (val)) argument
88 #define WR2(slot, off, val) SDHCI_WRITE_2((slot)->bus, (slot), (off), (val)) argument
89 #define WR4(slot, off, val) SDHCI_WRITE_4((slot)->bus, (slot), (off), (val)) argument
90 #define WR_MULTI_4(slot, off, ptr, count) \ argument
91 SDHCI_WRITE_MULTI_4((slot)->bus, (slot), (off), (ptr), (count))
93 static void sdhci_acmd_irq(struct sdhci_slot *slot, uint16_t acmd_err);
96 static void sdhci_cmd_irq(struct sdhci_slot *slot, uint32_t intmask);
97 static void sdhci_data_irq(struct sdhci_slot *slot, uint32_t intmask);
98 static int sdhci_exec_tuning(struct sdhci_slot *slot, bool reset);
99 static void sdhci_handle_card_present_locked(struct sdhci_slot *slot,
101 static void sdhci_finish_command(struct sdhci_slot *slot);
102 static void sdhci_init(struct sdhci_slot *slot);
103 static void sdhci_read_block_pio(struct sdhci_slot *slot);
104 static void sdhci_req_done(struct sdhci_slot *slot);
107 static void sdhci_set_clock(struct sdhci_slot *slot, uint32_t clock);
108 static void sdhci_set_power(struct sdhci_slot *slot, u_char power);
109 static void sdhci_set_transfer_mode(struct sdhci_slot *slot,
111 static void sdhci_start(struct sdhci_slot *slot);
113 static void sdhci_start_command(struct sdhci_slot *slot,
115 static void sdhci_start_data(struct sdhci_slot *slot,
117 static void sdhci_write_block_pio(struct sdhci_slot *slot);
118 static void sdhci_transfer_pio(struct sdhci_slot *slot);
123 static int sdhci_cam_get_possible_host_clock(const struct sdhci_slot *slot,
126 static int sdhci_cam_request(struct sdhci_slot *slot, union ccb *ccb);
127 static int sdhci_cam_settran_settings(struct sdhci_slot *slot, union ccb *ccb);
128 static int sdhci_cam_update_ios(struct sdhci_slot *slot);
132 static int sdhci_dma_alloc(struct sdhci_slot *slot);
133 static void sdhci_dma_free(struct sdhci_slot *slot);
134 static void sdhci_dumpcaps(struct sdhci_slot *slot);
135 static void sdhci_dumpcaps_buf(struct sdhci_slot *slot, struct sbuf *s);
136 static void sdhci_dumpregs(struct sdhci_slot *slot);
137 static void sdhci_dumpregs_buf(struct sdhci_slot *slot, struct sbuf *s);
142 static int slot_printf(const struct sdhci_slot *slot, const char * fmt, ...)
144 static int slot_sprintf(const struct sdhci_slot *slot, struct sbuf *s,
146 static uint32_t sdhci_tuning_intmask(const struct sdhci_slot *slot);
151 mtx_init(&_slot->mtx, "SD slot mtx", "sdhci", MTX_DEF)
190 slot_printf(const struct sdhci_slot *slot, const char * fmt, ...) in slot_printf() argument
204 retval += printf("%s-slot%d: %s", in slot_printf()
205 device_get_nameunit(slot->bus), slot->num, buf); in slot_printf()
210 slot_sprintf(const struct sdhci_slot *slot, struct sbuf *s, in slot_sprintf() argument
216 retval = sbuf_printf(s, "%s-slot%d: ", device_get_nameunit(slot->bus), slot->num); in slot_sprintf()
226 sdhci_dumpregs_buf(struct sdhci_slot *slot, struct sbuf *s) in sdhci_dumpregs_buf() argument
228 slot_sprintf(slot, s, "============== REGISTER DUMP ==============\n"); in sdhci_dumpregs_buf()
230 slot_sprintf(slot, s, "Sys addr: 0x%08x | Version: 0x%08x\n", in sdhci_dumpregs_buf()
231 RD4(slot, SDHCI_DMA_ADDRESS), RD2(slot, SDHCI_HOST_VERSION)); in sdhci_dumpregs_buf()
232 slot_sprintf(slot, s, "Blk size: 0x%08x | Blk cnt: 0x%08x\n", in sdhci_dumpregs_buf()
233 RD2(slot, SDHCI_BLOCK_SIZE), RD2(slot, SDHCI_BLOCK_COUNT)); in sdhci_dumpregs_buf()
234 slot_sprintf(slot, s, "Argument: 0x%08x | Trn mode: 0x%08x\n", in sdhci_dumpregs_buf()
235 RD4(slot, SDHCI_ARGUMENT), RD2(slot, SDHCI_TRANSFER_MODE)); in sdhci_dumpregs_buf()
236 slot_sprintf(slot, s, "Present: 0x%08x | Host ctl: 0x%08x\n", in sdhci_dumpregs_buf()
237 RD4(slot, SDHCI_PRESENT_STATE), RD1(slot, SDHCI_HOST_CONTROL)); in sdhci_dumpregs_buf()
238 slot_sprintf(slot, s, "Power: 0x%08x | Blk gap: 0x%08x\n", in sdhci_dumpregs_buf()
239 RD1(slot, SDHCI_POWER_CONTROL), RD1(slot, SDHCI_BLOCK_GAP_CONTROL)); in sdhci_dumpregs_buf()
240 slot_sprintf(slot, s, "Wake-up: 0x%08x | Clock: 0x%08x\n", in sdhci_dumpregs_buf()
241 RD1(slot, SDHCI_WAKE_UP_CONTROL), RD2(slot, SDHCI_CLOCK_CONTROL)); in sdhci_dumpregs_buf()
242 slot_sprintf(slot, s, "Timeout: 0x%08x | Int stat: 0x%08x\n", in sdhci_dumpregs_buf()
243 RD1(slot, SDHCI_TIMEOUT_CONTROL), RD4(slot, SDHCI_INT_STATUS)); in sdhci_dumpregs_buf()
244 slot_sprintf(slot, s, "Int enab: 0x%08x | Sig enab: 0x%08x\n", in sdhci_dumpregs_buf()
245 RD4(slot, SDHCI_INT_ENABLE), RD4(slot, SDHCI_SIGNAL_ENABLE)); in sdhci_dumpregs_buf()
246 slot_sprintf(slot, s, "AC12 err: 0x%08x | Host ctl2:0x%08x\n", in sdhci_dumpregs_buf()
247 RD2(slot, SDHCI_ACMD12_ERR), RD2(slot, SDHCI_HOST_CONTROL2)); in sdhci_dumpregs_buf()
248 slot_sprintf(slot, s, "Caps: 0x%08x | Caps2: 0x%08x\n", in sdhci_dumpregs_buf()
249 RD4(slot, SDHCI_CAPABILITIES), RD4(slot, SDHCI_CAPABILITIES2)); in sdhci_dumpregs_buf()
250 slot_sprintf(slot, s, "Max curr: 0x%08x | ADMA err: 0x%08x\n", in sdhci_dumpregs_buf()
251 RD4(slot, SDHCI_MAX_CURRENT), RD1(slot, SDHCI_ADMA_ERR)); in sdhci_dumpregs_buf()
252 slot_sprintf(slot, s, "ADMA addr:0x%08x | Slot int: 0x%08x\n", in sdhci_dumpregs_buf()
253 RD4(slot, SDHCI_ADMA_ADDRESS_LO), RD2(slot, SDHCI_SLOT_INT_STATUS)); in sdhci_dumpregs_buf()
255 slot_sprintf(slot, s, "===========================================\n"); in sdhci_dumpregs_buf()
259 sdhci_dumpregs(struct sdhci_slot *slot) in sdhci_dumpregs() argument
264 slot_printf(slot, "sdhci_dumpregs: Failed to allocate memory for sbuf\n"); in sdhci_dumpregs()
269 sdhci_dumpregs_buf(slot, &s); in sdhci_dumpregs()
277 struct sdhci_slot *slot = arg1; in sdhci_syctl_dumpregs() local
282 sdhci_dumpregs_buf(slot, &s); in sdhci_syctl_dumpregs()
290 sdhci_dumpcaps_buf(struct sdhci_slot *slot, struct sbuf *s) in sdhci_dumpcaps_buf() argument
292 int host_caps = slot->host.caps; in sdhci_dumpcaps_buf()
293 int caps = slot->caps; in sdhci_dumpcaps_buf()
295 slot_sprintf(slot, s, in sdhci_dumpcaps_buf()
297 slot->max_clk / 1000000, in sdhci_dumpcaps_buf()
304 (slot->opt & SDHCI_SLOT_EMBEDDED)) ? " 1.8V" : "", in sdhci_dumpcaps_buf()
310 (slot->opt & SDHCI_HAVE_DMA) ? "DMA" : "PIO", in sdhci_dumpcaps_buf()
311 (slot->opt & SDHCI_SLOT_EMBEDDED) ? "embedded" : in sdhci_dumpcaps_buf()
312 (slot->opt & SDHCI_NON_REMOVABLE) ? "non-removable" : in sdhci_dumpcaps_buf()
316 slot_sprintf(slot, s, "eMMC:%s%s%s%s\n", in sdhci_dumpcaps_buf()
326 slot_sprintf(slot, s, "UHS-I:%s%s%s%s%s\n", in sdhci_dumpcaps_buf()
332 if (slot->opt & SDHCI_TUNING_SUPPORTED) in sdhci_dumpcaps_buf()
333 slot_sprintf(slot, s, in sdhci_dumpcaps_buf()
335 slot->retune_count, slot->retune_mode + 1); in sdhci_dumpcaps_buf()
339 sdhci_dumpcaps(struct sdhci_slot *slot) in sdhci_dumpcaps() argument
344 slot_printf(slot, "sdhci_dumpcaps: Failed to allocate memory for sbuf\n"); in sdhci_dumpcaps()
349 sdhci_dumpcaps_buf(slot, &s); in sdhci_dumpcaps()
357 struct sdhci_slot *slot = arg1; in sdhci_syctl_dumpcaps() local
362 sdhci_dumpcaps_buf(slot, &s); in sdhci_syctl_dumpcaps()
370 sdhci_tuning_intmask(const struct sdhci_slot *slot) in sdhci_tuning_intmask() argument
375 if (slot->opt & SDHCI_TUNING_ENABLED) { in sdhci_tuning_intmask()
377 if (slot->retune_mode == SDHCI_RETUNE_MODE_2 || in sdhci_tuning_intmask()
378 slot->retune_mode == SDHCI_RETUNE_MODE_3) in sdhci_tuning_intmask()
385 sdhci_init(struct sdhci_slot *slot) in sdhci_init() argument
388 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_ALL); in sdhci_init()
391 slot->intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | in sdhci_init()
398 if (!(slot->quirks & SDHCI_QUIRK_POLL_CARD_PRESENT) && in sdhci_init()
399 !(slot->opt & SDHCI_NON_REMOVABLE)) { in sdhci_init()
400 slot->intmask |= SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT; in sdhci_init()
403 WR4(slot, SDHCI_INT_ENABLE, slot->intmask); in sdhci_init()
404 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask); in sdhci_init()
408 sdhci_set_clock(struct sdhci_slot *slot, uint32_t clock) in sdhci_set_clock() argument
417 if (clock == slot->clock) in sdhci_set_clock()
419 clock = SDHCI_SET_CLOCK(slot->bus, slot, clock); in sdhci_set_clock()
420 slot->clock = clock; in sdhci_set_clock()
423 clk = RD2(slot, SDHCI_CLOCK_CONTROL); in sdhci_set_clock()
424 WR2(slot, SDHCI_CLOCK_CONTROL, clk & ~SDHCI_CLOCK_CARD_EN); in sdhci_set_clock()
430 clk_base = slot->max_clk; in sdhci_set_clock()
431 if (slot->quirks & SDHCI_QUIRK_BCM577XX_400KHZ_CLKSRC) { in sdhci_set_clock()
432 clk_sel = RD2(slot, BCM577XX_HOST_CONTROL) & in sdhci_set_clock()
447 WR2(slot, BCM577XX_HOST_CONTROL, clk_sel); in sdhci_set_clock()
451 if (slot->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) in sdhci_set_clock()
452 slot->timeout_clk = slot->clock / 1000; in sdhci_set_clock()
454 if (slot->version < SDHCI_SPEC_300) { in sdhci_set_clock()
478 slot_printf(slot, "Divider %d for freq %d (base %d)\n", in sdhci_set_clock()
486 WR2(slot, SDHCI_CLOCK_CONTROL, clk); in sdhci_set_clock()
489 WR2(slot, SDHCI_CLOCK_CONTROL, clk); in sdhci_set_clock()
492 while (!((clk = RD2(slot, SDHCI_CLOCK_CONTROL)) in sdhci_set_clock()
495 slot_printf(slot, in sdhci_set_clock()
497 sdhci_dumpregs(slot); in sdhci_set_clock()
505 WR2(slot, SDHCI_CLOCK_CONTROL, clk); in sdhci_set_clock()
509 sdhci_set_power(struct sdhci_slot *slot, u_char power) in sdhci_set_power() argument
514 if (slot->power == power) in sdhci_set_power()
517 slot->power = power; in sdhci_set_power()
521 WR1(slot, SDHCI_POWER_CONTROL, pwr); in sdhci_set_power()
539 WR1(slot, SDHCI_POWER_CONTROL, pwr); in sdhci_set_power()
547 WR1(slot, SDHCI_POWER_CONTROL, pwr); in sdhci_set_power()
548 if (RD1(slot, SDHCI_POWER_CONTROL) & SDHCI_POWER_ON) in sdhci_set_power()
552 if (!(RD1(slot, SDHCI_POWER_CONTROL) & SDHCI_POWER_ON)) in sdhci_set_power()
553 slot_printf(slot, "Bus power failed to enable\n"); in sdhci_set_power()
555 if (slot->quirks & SDHCI_QUIRK_INTEL_POWER_UP_RESET) { in sdhci_set_power()
556 WR1(slot, SDHCI_POWER_CONTROL, pwr | 0x10); in sdhci_set_power()
558 WR1(slot, SDHCI_POWER_CONTROL, pwr); in sdhci_set_power()
564 sdhci_read_block_pio(struct sdhci_slot *slot) in sdhci_read_block_pio() argument
570 buffer = slot->curcmd->data->data; in sdhci_read_block_pio()
571 buffer += slot->offset; in sdhci_read_block_pio()
574 if (slot->curcmd->data->flags & MMC_DATA_BLOCK_SIZE) in sdhci_read_block_pio()
575 left = min(slot->curcmd->data->block_size, in sdhci_read_block_pio()
576 slot->curcmd->data->len - slot->offset); in sdhci_read_block_pio()
579 left = min(512, slot->curcmd->data->len - slot->offset); in sdhci_read_block_pio()
580 slot->offset += left; in sdhci_read_block_pio()
583 if (slot->quirks & SDHCI_QUIRK_BROKEN_TIMINGS) in sdhci_read_block_pio()
588 data = RD4(slot, SDHCI_BUFFER); in sdhci_read_block_pio()
597 RD_MULTI_4(slot, SDHCI_BUFFER, in sdhci_read_block_pio()
603 data = RD4(slot, SDHCI_BUFFER); in sdhci_read_block_pio()
613 sdhci_write_block_pio(struct sdhci_slot *slot) in sdhci_write_block_pio() argument
619 buffer = slot->curcmd->data->data; in sdhci_write_block_pio()
620 buffer += slot->offset; in sdhci_write_block_pio()
623 if (slot->curcmd->data->flags & MMC_DATA_BLOCK_SIZE) { in sdhci_write_block_pio()
624 left = min(slot->curcmd->data->block_size, in sdhci_write_block_pio()
625 slot->curcmd->data->len - slot->offset); in sdhci_write_block_pio()
628 left = min(512, slot->curcmd->data->len - slot->offset); in sdhci_write_block_pio()
629 slot->offset += left; in sdhci_write_block_pio()
640 WR4(slot, SDHCI_BUFFER, data); in sdhci_write_block_pio()
643 WR_MULTI_4(slot, SDHCI_BUFFER, in sdhci_write_block_pio()
654 WR4(slot, SDHCI_BUFFER, data); in sdhci_write_block_pio()
659 sdhci_transfer_pio(struct sdhci_slot *slot) in sdhci_transfer_pio() argument
663 if (slot->curcmd->data->flags & MMC_DATA_READ) { in sdhci_transfer_pio()
664 while (RD4(slot, SDHCI_PRESENT_STATE) & in sdhci_transfer_pio()
666 sdhci_read_block_pio(slot); in sdhci_transfer_pio()
667 if (slot->offset >= slot->curcmd->data->len) in sdhci_transfer_pio()
671 while (RD4(slot, SDHCI_PRESENT_STATE) & in sdhci_transfer_pio()
673 sdhci_write_block_pio(slot); in sdhci_transfer_pio()
674 if (slot->offset >= slot->curcmd->data->len) in sdhci_transfer_pio()
683 struct sdhci_slot *slot = arg; local
688 SDHCI_LOCK(slot);
689 if (SDHCI_GET_CARD_PRESENT(slot->bus, slot)) {
691 if (slot->card_present == 0) {
693 if (slot->dev == NULL) {
697 slot_printf(slot, "Card inserted\n");
699 slot->card_present = 1;
700 mmccam_start_discovery(slot->sim);
701 SDHCI_UNLOCK(slot);
703 SDHCI_UNLOCK(slot);
705 d = slot->dev = device_add_child(slot->bus, "mmc", DEVICE_UNIT_ANY);
707 device_set_ivars(d, slot);
713 SDHCI_UNLOCK(slot);
716 if (slot->card_present == 1) {
718 if (slot->dev != NULL) {
719 d = slot->dev;
723 slot_printf(slot, "Card removed\n");
724 slot->dev = NULL;
726 slot->card_present = 0;
727 mmccam_start_discovery(slot->sim);
728 SDHCI_UNLOCK(slot);
730 slot->intmask &= ~sdhci_tuning_intmask(slot);
731 WR4(slot, SDHCI_INT_ENABLE, slot->intmask);
732 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask);
733 slot->opt &= ~SDHCI_TUNING_ENABLED;
734 SDHCI_UNLOCK(slot);
735 callout_drain(&slot->retune_callout);
737 device_delete_child(slot->bus, d);
741 SDHCI_UNLOCK(slot);
746 sdhci_handle_card_present_locked(struct sdhci_slot *slot, bool is_present) argument
762 was_present = slot->card_present;
764 was_present = slot->dev != NULL;
768 &slot->card_delayed_task, -SDHCI_INSERT_DELAY_TICKS);
770 taskqueue_enqueue(taskqueue_bus, &slot->card_task);
775 sdhci_handle_card_present(struct sdhci_slot *slot, bool is_present) argument
778 SDHCI_LOCK(slot);
779 sdhci_handle_card_present_locked(slot, is_present);
780 SDHCI_UNLOCK(slot);
786 struct sdhci_slot *slot = arg; local
788 sdhci_handle_card_present(slot,
789 SDHCI_GET_CARD_PRESENT(slot->bus, slot));
790 callout_reset(&slot->card_poll_callout, SDHCI_CARD_PRESENT_TICKS,
791 sdhci_card_poll, slot);
795 sdhci_dma_alloc(struct sdhci_slot *slot) argument
799 if (!(slot->quirks & SDHCI_QUIRK_BROKEN_SDMA_BOUNDARY)) {
801 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_4K;
803 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_8K;
805 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_16K;
807 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_32K;
809 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_64K;
811 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_128K;
813 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_256K;
815 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_512K;
817 slot->sdma_bbufsz = SDHCI_SDMA_BNDRY_TO_BBUFSZ(slot->sdma_boundary);
827 err = bus_dma_tag_create(bus_get_dma_tag(slot->bus), slot->sdma_bbufsz,
829 slot->sdma_bbufsz, 1, slot->sdma_bbufsz, BUS_DMA_ALLOCNOW,
830 NULL, NULL, &slot->dmatag);
832 slot_printf(slot, "Can't create DMA tag for SDMA\n");
836 err = bus_dmamem_alloc(slot->dmatag, (void **)&slot->dmamem,
837 BUS_DMA_NOWAIT, &slot->dmamap);
839 slot_printf(slot, "Can't alloc DMA memory for SDMA\n");
840 bus_dma_tag_destroy(slot->dmatag);
844 err = bus_dmamap_load(slot->dmatag, slot->dmamap,
845 (void *)slot->dmamem, slot->sdma_bbufsz, sdhci_getaddr,
846 &slot->paddr, 0);
847 if (err != 0 || slot->paddr == 0) {
848 slot_printf(slot, "Can't load DMA memory for SDMA\n");
849 bus_dmamem_free(slot->dmatag, slot->dmamem, slot->dmamap);
850 bus_dma_tag_destroy(slot->dmatag);
861 sdhci_dma_free(struct sdhci_slot *slot) argument
864 bus_dmamap_unload(slot->dmatag, slot->dmamap);
865 bus_dmamem_free(slot->dmatag, slot->dmamem, slot->dmamap);
866 bus_dma_tag_destroy(slot->dmatag);
870 sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num) argument
879 SDHCI_LOCK_INIT(slot);
881 slot->num = num;
882 slot->bus = dev;
884 slot->version = (RD2(slot, SDHCI_HOST_VERSION)
886 if (slot->quirks & SDHCI_QUIRK_MISSING_CAPS) {
887 caps = slot->caps;
888 caps2 = slot->caps2;
890 caps = RD4(slot, SDHCI_CAPABILITIES);
891 if (slot->version >= SDHCI_SPEC_300)
892 caps2 = RD4(slot, SDHCI_CAPABILITIES2);
896 if (slot->version >= SDHCI_SPEC_300) {
899 slot_printf(slot,
901 SDHCI_LOCK_DESTROY(slot);
905 slot->opt |= SDHCI_SLOT_EMBEDDED | SDHCI_NON_REMOVABLE;
909 if (slot->version >= SDHCI_SPEC_300)
916 slot->max_clk = freq * 1000000;
922 if (slot->max_clk == 0) {
923 slot->max_clk = SDHCI_DEFAULT_MAX_FREQ * 1000000;
924 slot_printf(slot, "Hardware doesn't specify base clock "
929 if (slot->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) {
930 slot->timeout_clk = slot->max_clk / 1000;
931 } else if (slot->quirks & SDHCI_QUIRK_DATA_TIMEOUT_1MHZ) {
932 slot->timeout_clk = 1000;
934 slot->timeout_clk = (caps & SDHCI_TIMEOUT_CLK_MASK) >>
937 slot->timeout_clk *= 1000;
944 if (slot->timeout_clk == 0) {
945 slot_printf(slot, "Hardware doesn't specify timeout clock "
947 slot->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
950 slot->host.f_min = SDHCI_MIN_FREQ(slot->bus, slot);
951 slot->host.f_max = slot->max_clk;
952 slot->host.host_ocr = 0;
954 slot->host.host_ocr |= MMC_OCR_320_330 | MMC_OCR_330_340;
956 slot->host.host_ocr |= MMC_OCR_290_300 | MMC_OCR_300_310;
962 if ((caps & SDHCI_CAN_VDD_180) && (slot->version < SDHCI_SPEC_300 ||
963 (slot->opt & SDHCI_SLOT_EMBEDDED)))
964 slot->host.host_ocr |= MMC_OCR_LOW_VOLTAGE;
965 if (slot->host.host_ocr == 0) {
966 slot_printf(slot, "Hardware doesn't report any "
970 host_caps = slot->host.caps;
976 if (slot->quirks & SDHCI_QUIRK_BOOT_NOACC)
978 if (slot->quirks & SDHCI_QUIRK_WAIT_WHILE_BUSY)
986 if (!(slot->quirks & SDHCI_QUIRK_BROKEN_MMC_HS200))
991 !(slot->quirks & SDHCI_QUIRK_BROKEN_UHS_DDR50))
993 if (slot->quirks & SDHCI_QUIRK_MMC_DDR52)
995 if (slot->quirks & SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 &&
998 if (slot->quirks & SDHCI_QUIRK_MMC_HS400_IF_CAN_SDR104 &&
1038 slot->opt |= SDHCI_TUNING_SUPPORTED;
1039 slot->tune_req = malloc(sizeof(*slot->tune_req), M_DEVBUF,
1041 slot->tune_cmd = malloc(sizeof(*slot->tune_cmd), M_DEVBUF,
1043 slot->tune_data = malloc(sizeof(*slot->tune_data), M_DEVBUF,
1046 slot->opt |= SDHCI_SDR50_NEEDS_TUNING;
1047 slot->retune_mode = (caps2 & SDHCI_RETUNE_MODES_MASK) >>
1049 if (slot->retune_mode == SDHCI_RETUNE_MODE_1) {
1050 slot->retune_count = (caps2 & SDHCI_RETUNE_CNT_MASK) >>
1052 if (slot->retune_count > 0xb) {
1053 slot_printf(slot, "Unknown re-tuning count "
1054 "%x, using 1 sec\n", slot->retune_count);
1055 slot->retune_count = 1;
1056 } else if (slot->retune_count != 0)
1057 slot->retune_count =
1058 1 << (slot->retune_count - 1);
1092 slot->host.caps = host_caps;
1096 slot->opt |= SDHCI_HAVE_DMA;
1098 if (slot->quirks & SDHCI_QUIRK_BROKEN_DMA)
1099 slot->opt &= ~SDHCI_HAVE_DMA;
1100 if (slot->quirks & SDHCI_QUIRK_FORCE_DMA)
1101 slot->opt |= SDHCI_HAVE_DMA;
1102 if (slot->quirks & SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE)
1103 slot->opt |= SDHCI_NON_REMOVABLE;
1109 if (slot->opt & SDHCI_PLATFORM_TRANSFER)
1110 slot->opt &= ~SDHCI_HAVE_DMA;
1112 if (slot->opt & SDHCI_HAVE_DMA) {
1113 err = sdhci_dma_alloc(slot);
1115 if (slot->opt & SDHCI_TUNING_SUPPORTED) {
1116 free(slot->tune_req, M_DEVBUF);
1117 free(slot->tune_cmd, M_DEVBUF);
1118 free(slot->tune_data, M_DEVBUF);
1120 SDHCI_LOCK_DESTROY(slot);
1126 sdhci_dumpcaps(slot);
1127 sdhci_dumpregs(slot);
1130 slot->timeout = 10;
1131 SYSCTL_ADD_INT(device_get_sysctl_ctx(slot->bus),
1132 SYSCTL_CHILDREN(device_get_sysctl_tree(slot->bus)), OID_AUTO,
1133 "timeout", CTLFLAG_RWTUN, &slot->timeout, 0,
1135 TASK_INIT(&slot->card_task, 0, sdhci_card_task, slot);
1136 TIMEOUT_TASK_INIT(taskqueue_bus, &slot->card_delayed_task, 0,
1137 sdhci_card_task, slot);
1138 callout_init(&slot->card_poll_callout, 1);
1139 callout_init_mtx(&slot->timeout_callout, &slot->mtx, 0);
1140 callout_init_mtx(&slot->retune_callout, &slot->mtx, 0);
1142 if ((slot->quirks & SDHCI_QUIRK_POLL_CARD_PRESENT) &&
1143 !(slot->opt & SDHCI_NON_REMOVABLE)) {
1144 callout_reset(&slot->card_poll_callout,
1145 SDHCI_CARD_PRESENT_TICKS, sdhci_card_poll, slot);
1148 sdhci_init(slot);
1150 snprintf(node_name, sizeof(node_name), "slot%d", slot->num);
1154 OID_AUTO, node_name, CTLFLAG_RW, 0, "slot specific node");
1157 OID_AUTO, "quirks", CTLFLAG_RD, &slot->quirks, 0, "Slot quirks");
1165 slot, 0, &sdhci_syctl_dumpregs,
1170 slot, 0, &sdhci_syctl_dumpcaps,
1178 sdhci_start_slot(struct sdhci_slot *slot) argument
1181 sdhci_card_task(slot, 0);
1186 sdhci_cleanup_slot(struct sdhci_slot *slot) argument
1190 callout_drain(&slot->timeout_callout);
1191 callout_drain(&slot->card_poll_callout);
1192 callout_drain(&slot->retune_callout);
1193 taskqueue_drain(taskqueue_bus, &slot->card_task);
1194 taskqueue_drain_timeout(taskqueue_bus, &slot->card_delayed_task);
1196 SDHCI_LOCK(slot);
1197 d = slot->dev;
1198 slot->dev = NULL;
1199 SDHCI_UNLOCK(slot);
1201 device_delete_child(slot->bus, d);
1203 SDHCI_LOCK(slot);
1204 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_ALL);
1205 SDHCI_UNLOCK(slot);
1206 if (slot->opt & SDHCI_HAVE_DMA)
1207 sdhci_dma_free(slot);
1208 if (slot->opt & SDHCI_TUNING_SUPPORTED) {
1209 free(slot->tune_req, M_DEVBUF);
1210 free(slot->tune_cmd, M_DEVBUF);
1211 free(slot->tune_data, M_DEVBUF);
1214 SDHCI_LOCK_DESTROY(slot);
1220 sdhci_generic_suspend(struct sdhci_slot *slot) argument
1228 callout_drain(&slot->retune_callout);
1229 SDHCI_LOCK(slot);
1230 slot->opt &= ~SDHCI_TUNING_ENABLED;
1231 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_ALL);
1232 SDHCI_UNLOCK(slot);
1238 sdhci_generic_resume(struct sdhci_slot *slot) argument
1241 SDHCI_LOCK(slot);
1242 sdhci_init(slot);
1243 SDHCI_UNLOCK(slot);
1249 sdhci_generic_reset(device_t brdev __unused, struct sdhci_slot *slot, argument
1255 if (slot->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
1256 if (!SDHCI_GET_CARD_PRESENT(slot->bus, slot))
1262 (slot->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET)) {
1264 clock = slot->clock;
1265 slot->clock = 0;
1266 sdhci_set_clock(slot, clock);
1270 slot->clock = 0;
1271 slot->power = 0;
1274 WR1(slot, SDHCI_SOFTWARE_RESET, mask);
1276 if (slot->quirks & SDHCI_QUIRK_WAITFOR_RESET_ASSERTED) {
1286 while ((RD1(slot, SDHCI_SOFTWARE_RESET) & mask) != mask) {
1297 while (RD1(slot, SDHCI_SOFTWARE_RESET) & mask) {
1299 slot_printf(slot, "Reset 0x%x never completed.\n",
1301 sdhci_dumpregs(slot);
1310 sdhci_generic_min_freq(device_t brdev __unused, struct sdhci_slot *slot) argument
1313 if (slot->version >= SDHCI_SPEC_300)
1314 return (slot->max_clk / SDHCI_300_MAX_DIVIDER);
1316 return (slot->max_clk / SDHCI_200_MAX_DIVIDER);
1320 sdhci_generic_get_card_present(device_t brdev __unused, struct sdhci_slot *slot) argument
1323 if (slot->opt & SDHCI_NON_REMOVABLE)
1326 return (RD4(slot, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
1330 sdhci_generic_set_uhs_timing(device_t brdev __unused, struct sdhci_slot *slot) argument
1335 if (slot->version < SDHCI_SPEC_300)
1338 SDHCI_ASSERT_LOCKED(slot);
1339 ios = &slot->host.ios;
1340 sdhci_set_clock(slot, 0);
1341 hostctrl2 = RD2(slot, SDHCI_HOST_CONTROL2);
1360 WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2);
1361 sdhci_set_clock(slot, ios->clock);
1367 struct sdhci_slot *slot = device_get_ivars(reqdev); local
1368 struct mmc_ios *ios = &slot->host.ios;
1370 SDHCI_LOCK(slot);
1373 WR4(slot, SDHCI_SIGNAL_ENABLE, 0);
1374 sdhci_init(slot);
1377 sdhci_set_clock(slot, ios->clock);
1378 sdhci_set_power(slot, (ios->power_mode == power_off) ? 0 : ios->vdd);
1380 slot->hostctrl |= SDHCI_CTRL_8BITBUS;
1381 slot->hostctrl &= ~SDHCI_CTRL_4BITBUS;
1383 slot->hostctrl &= ~SDHCI_CTRL_8BITBUS;
1384 slot->hostctrl |= SDHCI_CTRL_4BITBUS;
1386 slot->hostctrl &= ~SDHCI_CTRL_8BITBUS;
1387 slot->hostctrl &= ~SDHCI_CTRL_4BITBUS;
1392 !(slot->quirks & SDHCI_QUIRK_DONT_SET_HISPD_BIT))
1393 slot->hostctrl |= SDHCI_CTRL_HISPD;
1395 slot->hostctrl &= ~SDHCI_CTRL_HISPD;
1396 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl);
1397 SDHCI_SET_UHS_TIMING(brdev, slot);
1399 if (slot->quirks & SDHCI_QUIRK_RESET_ON_IOS)
1400 SDHCI_RESET(slot->bus, slot,
1403 SDHCI_UNLOCK(slot);
1410 struct sdhci_slot *slot = device_get_ivars(reqdev); local
1415 if (slot->version < SDHCI_SPEC_300)
1419 vccq = slot->host.ios.vccq;
1420 SDHCI_LOCK(slot);
1421 sdhci_set_clock(slot, 0);
1422 hostctrl2 = RD2(slot, SDHCI_HOST_CONTROL2);
1428 WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2);
1430 hostctrl2 = RD2(slot, SDHCI_HOST_CONTROL2);
1436 if (!(slot->host.caps & MMC_CAP_SIGNALING_180)) {
1443 WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2);
1445 hostctrl2 = RD2(slot, SDHCI_HOST_CONTROL2);
1451 slot_printf(slot,
1457 sdhci_set_clock(slot, slot->host.ios.clock);
1458 SDHCI_UNLOCK(slot);
1465 struct sdhci_slot *slot = device_get_ivars(reqdev); local
1466 const struct mmc_ios *ios = &slot->host.ios;
1472 if (!(slot->opt & SDHCI_TUNING_SUPPORTED))
1475 slot->retune_ticks = slot->retune_count * hz;
1477 SDHCI_LOCK(slot);
1480 slot_printf(slot, "HS400 must be tuned in HS200 mode\n");
1481 SDHCI_UNLOCK(slot);
1490 slot->retune_ticks = 0;
1497 if (slot->opt & SDHCI_SDR50_NEEDS_TUNING)
1499 SDHCI_UNLOCK(slot);
1502 slot_printf(slot, "Tuning requested but not required.\n");
1503 SDHCI_UNLOCK(slot);
1507 tune_cmd = slot->tune_cmd;
1511 tune_data = tune_cmd->data = slot->tune_data;
1517 tune_data->mrq = tune_cmd->mrq = slot->tune_req;
1519 slot->opt &= ~SDHCI_TUNING_ENABLED;
1520 err = sdhci_exec_tuning(slot, true);
1522 slot->opt |= SDHCI_TUNING_ENABLED;
1523 slot->intmask |= sdhci_tuning_intmask(slot);
1524 WR4(slot, SDHCI_INT_ENABLE, slot->intmask);
1525 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask);
1526 if (slot->retune_ticks) {
1527 callout_reset(&slot->retune_callout, slot->retune_ticks,
1528 sdhci_retune, slot);
1531 SDHCI_UNLOCK(slot);
1538 struct sdhci_slot *slot = device_get_ivars(reqdev); local
1541 if (!(slot->opt & SDHCI_TUNING_ENABLED))
1545 if (slot->host.ios.timing == bus_timing_mmc_hs400)
1548 SDHCI_LOCK(slot);
1549 err = sdhci_exec_tuning(slot, reset);
1557 * is enabled. Note that due to slot->retune_req not being cleared in
1561 if (slot->retune_ticks) {
1562 callout_reset(&slot->retune_callout, slot->retune_ticks,
1563 sdhci_retune, slot);
1565 SDHCI_UNLOCK(slot);
1570 sdhci_exec_tuning(struct sdhci_slot *slot, bool reset) argument
1579 SDHCI_ASSERT_LOCKED(slot);
1580 if (slot->req != NULL)
1584 opt = slot->opt;
1585 slot->opt = opt & ~SDHCI_HAVE_DMA;
1591 intmask = slot->intmask;
1592 slot->intmask = SDHCI_INT_DATA_AVAIL;
1593 WR4(slot, SDHCI_INT_ENABLE, SDHCI_INT_DATA_AVAIL);
1594 WR4(slot, SDHCI_SIGNAL_ENABLE, SDHCI_INT_DATA_AVAIL);
1596 hostctrl2 = RD2(slot, SDHCI_HOST_CONTROL2);
1601 WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2 | SDHCI_CTRL2_EXEC_TUNING);
1603 tune_req = slot->tune_req;
1604 tune_cmd = slot->tune_cmd;
1609 tune_req->done_data = slot;
1610 slot->req = tune_req;
1611 slot->flags = 0;
1612 sdhci_start(slot);
1614 msleep(tune_req, &slot->mtx, 0, "sdhciet", 0);
1617 hostctrl2 = RD2(slot, SDHCI_HOST_CONTROL2);
1627 * SDHCI_INT_DMA_END and/or SDHCI_INT_RESPONSE in slot->intmask
1631 slot->opt = opt;
1632 slot->intmask = intmask;
1633 WR4(slot, SDHCI_INT_ENABLE, intmask | SDHCI_INT_DMA_END |
1635 WR4(slot, SDHCI_SIGNAL_ENABLE, intmask);
1639 slot->retune_req = 0;
1643 slot_printf(slot, "Tuning failed, using fixed sampling clock\n");
1644 WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2 & ~(SDHCI_CTRL2_EXEC_TUNING |
1646 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
1653 struct sdhci_slot *slot = arg; local
1655 slot->retune_req |= SDHCI_RETUNE_REQ_NEEDED;
1660 sdhci_req_done(struct sdhci_slot *slot) argument
1665 slot_printf(slot, "%s\n", __func__);
1666 if (slot->ccb != NULL && slot->curcmd != NULL) {
1667 callout_stop(&slot->timeout_callout);
1668 ccb = slot->ccb;
1669 slot->ccb = NULL;
1670 slot->curcmd = NULL;
1683 sdhci_req_done(struct sdhci_slot *slot) argument
1687 if (slot->req != NULL && slot->curcmd != NULL) {
1688 callout_stop(&slot->timeout_callout);
1689 req = slot->req;
1690 slot->req = NULL;
1691 slot->curcmd = NULL;
1708 struct sdhci_slot *slot = arg; local
1710 if (slot->curcmd != NULL) {
1711 slot_printf(slot, "Controller timeout\n");
1712 sdhci_dumpregs(slot);
1713 SDHCI_RESET(slot->bus, slot,
1715 slot->curcmd->error = MMC_ERR_TIMEOUT;
1716 sdhci_req_done(slot);
1718 slot_printf(slot, "Spurious timeout - no active command\n");
1723 sdhci_set_transfer_mode(struct sdhci_slot *slot, const struct mmc_data *data) argument
1735 slot->ccb->mmcio.stop.opcode == MMC_STOP_TRANSMISSION &&
1737 slot->req->stop != NULL &&
1739 !(slot->quirks & SDHCI_QUIRK_BROKEN_AUTO_STOP)))
1744 if (slot->flags & SDHCI_USE_DMA)
1747 WR2(slot, SDHCI_TRANSFER_MODE, mode);
1751 sdhci_start_command(struct sdhci_slot *slot, struct mmc_command *cmd) argument
1756 slot->curcmd = cmd;
1757 slot->cmd_done = 0;
1763 slot_printf(slot, "Unsupported response type!\n");
1765 sdhci_req_done(slot);
1773 if (!SDHCI_GET_CARD_PRESENT(slot->bus, slot) ||
1774 slot->power == 0 ||
1775 slot->clock == 0) {
1776 slot_printf(slot,
1778 slot->power, slot->clock);
1780 sdhci_req_done(slot);
1794 if (cmd == &slot->ccb->mmcio.stop ||
1796 if (cmd == slot->req->stop ||
1812 while (mask & RD4(slot, SDHCI_PRESENT_STATE)) {
1814 slot_printf(slot, "Controller never released "
1816 sdhci_dumpregs(slot);
1818 sdhci_req_done(slot);
1843 sdhci_start_data(slot, cmd->data);
1849 if (slot->data_done == 0) {
1850 WR4(slot, SDHCI_SIGNAL_ENABLE,
1851 slot->intmask &= ~SDHCI_INT_RESPONSE);
1854 WR4(slot, SDHCI_ARGUMENT, cmd->arg);
1856 sdhci_set_transfer_mode(slot, cmd->data);
1858 slot_printf(slot, "Starting command opcode %#04x flags %#04x\n",
1862 WR2(slot, SDHCI_COMMAND_FLAGS, (cmd->opcode << 8) | (flags & 0xff));
1864 callout_reset(&slot->timeout_callout, slot->timeout * hz,
1865 sdhci_timeout, slot);
1869 sdhci_finish_command(struct sdhci_slot *slot) argument
1876 slot_printf(slot, "%s: called, err %d flags %#04x\n",
1877 __func__, slot->curcmd->error, slot->curcmd->flags);
1878 slot->cmd_done = 1;
1884 if (__predict_true(slot->curcmd->opcode != MMC_SEND_TUNING_BLOCK &&
1885 slot->curcmd->opcode != MMC_SEND_TUNING_BLOCK_HS200))
1886 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask |=
1889 if (slot->curcmd->error) {
1890 if (slot->curcmd->error == MMC_ERR_BADCRC)
1891 slot->retune_req |= SDHCI_RETUNE_REQ_RESET;
1892 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_CMD);
1893 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_DATA);
1894 sdhci_start(slot);
1898 if (slot->curcmd->flags & MMC_RSP_PRESENT) {
1899 if (slot->curcmd->flags & MMC_RSP_136) {
1903 val = RD4(slot, SDHCI_RESPONSE + i * 4);
1904 if (slot->quirks &
1906 slot->curcmd->resp[3 - i] = val;
1908 slot->curcmd->resp[3 - i] =
1914 slot->curcmd->resp[0] = RD4(slot, SDHCI_RESPONSE);
1917 slot_printf(slot, "Resp: %#04x %#04x %#04x %#04x\n",
1918 slot->curcmd->resp[0], slot->curcmd->resp[1],
1919 slot->curcmd->resp[2], slot->curcmd->resp[3]);
1922 if (slot->data_done)
1923 sdhci_start(slot);
1927 sdhci_start_data(struct sdhci_slot *slot, const struct mmc_data *data) argument
1932 if (data == NULL && (slot->curcmd->flags & MMC_RSP_BUSY) == 0) {
1933 slot->data_done = 1;
1937 slot->data_done = 0;
1941 if (slot->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) {
1946 current_timeout = (1 << 13) * 1000 / slot->timeout_clk;
1953 (slot->quirks & SDHCI_QUIRK_INCR_TIMEOUT_CONTROL)) {
1957 WR1(slot, SDHCI_TIMEOUT_CONTROL, div);
1963 if ((slot->opt & SDHCI_HAVE_DMA))
1964 slot->flags |= SDHCI_USE_DMA;
1966 if ((slot->quirks & SDHCI_QUIRK_BROKEN_TIMINGS) &&
1968 slot->flags &= ~SDHCI_USE_DMA;
1970 if ((slot->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) &&
1972 slot->flags &= ~SDHCI_USE_DMA;
1974 if (slot->flags & SDHCI_USE_DMA) {
1975 sdma_bbufsz = slot->sdma_bbufsz;
1977 bus_dmamap_sync(slot->dmatag, slot->dmamap,
1980 memcpy(slot->dmamem, data->data, ulmin(data->len,
1982 bus_dmamap_sync(slot->dmatag, slot->dmamap,
1985 WR4(slot, SDHCI_DMA_ADDRESS, slot->paddr);
1991 slot->intmask &= ~SDHCI_INT_DMA_END;
1993 slot->intmask |= SDHCI_INT_DMA_END;
1994 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask);
1997 slot->offset = 0;
2001 blksz = SDHCI_MAKE_BLKSZ(slot->sdma_boundary, data->block_size);
2004 slot_printf(slot, "SDIO Custom block params: blksz: "
2010 blksz = SDHCI_MAKE_BLKSZ(slot->sdma_boundary, ulmin(data->len, 512));
2014 WR2(slot, SDHCI_BLOCK_SIZE, blksz);
2015 WR2(slot, SDHCI_BLOCK_COUNT, blkcnt);
2017 slot_printf(slot, "Blk size: 0x%08x | Blk cnt: 0x%08x\n",
2022 sdhci_finish_data(struct sdhci_slot *slot) argument
2024 struct mmc_data *data = slot->curcmd->data;
2030 if (!slot->cmd_done) {
2031 WR4(slot, SDHCI_SIGNAL_ENABLE,
2032 slot->intmask |= SDHCI_INT_RESPONSE);
2035 if (!slot->data_done && (slot->flags & SDHCI_USE_DMA) &&
2036 slot->curcmd->data != NULL) {
2038 left = data->len - slot->offset;
2039 bus_dmamap_sync(slot->dmatag, slot->dmamap,
2041 memcpy((u_char*)data->data + slot->offset, slot->dmamem,
2042 ulmin(left, slot->sdma_bbufsz));
2044 bus_dmamap_sync(slot->dmatag, slot->dmamap,
2047 slot->data_done = 1;
2049 if (slot->curcmd->error) {
2050 if (slot->curcmd->error == MMC_ERR_BADCRC)
2051 slot->retune_req |= SDHCI_RETUNE_REQ_RESET;
2052 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_CMD);
2053 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_DATA);
2054 sdhci_start(slot);
2058 if (slot->cmd_done)
2059 sdhci_start(slot);
2064 sdhci_start(struct sdhci_slot *slot) argument
2069 ccb = slot->ccb;
2074 if (!(slot->flags & CMD_STARTED)) {
2075 slot->flags |= CMD_STARTED;
2076 sdhci_start_command(slot, &mmcio->cmd);
2085 if (!(slot->flags & STOP_STARTED) && mmcio->stop.opcode != 0) {
2086 slot->flags |= STOP_STARTED;
2087 sdhci_start_command(slot, &mmcio->stop);
2092 slot_printf(slot, "result: %d\n", mmcio->cmd.error);
2094 (slot->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST)) {
2095 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_CMD);
2096 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_DATA);
2099 sdhci_req_done(slot);
2103 sdhci_start(struct sdhci_slot *slot) argument
2107 req = slot->req;
2111 if (!(slot->flags & CMD_STARTED)) {
2112 slot->flags |= CMD_STARTED;
2113 sdhci_start_command(slot, req->cmd);
2116 if ((slot->quirks & SDHCI_QUIRK_BROKEN_AUTO_STOP) &&
2117 !(slot->flags & STOP_STARTED) && req->stop) {
2118 slot->flags |= STOP_STARTED;
2119 sdhci_start_command(slot, req->stop);
2123 slot_printf(slot, "result: %d\n", req->cmd->error);
2125 ((slot->curcmd == req->stop &&
2126 (slot->quirks & SDHCI_QUIRK_BROKEN_AUTO_STOP)) ||
2127 (slot->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) {
2128 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_CMD);
2129 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_DATA);
2132 sdhci_req_done(slot);
2140 struct sdhci_slot *slot = device_get_ivars(reqdev); local
2142 SDHCI_LOCK(slot);
2143 if (slot->req != NULL) {
2144 SDHCI_UNLOCK(slot);
2148 slot_printf(slot,
2154 slot->req = req;
2155 slot->flags = 0;
2156 sdhci_start(slot);
2157 SDHCI_UNLOCK(slot);
2159 while (slot->req != NULL) {
2160 sdhci_generic_intr(slot);
2170 struct sdhci_slot *slot = device_get_ivars(reqdev); local
2173 SDHCI_LOCK(slot);
2174 val = RD4(slot, SDHCI_PRESENT_STATE);
2175 SDHCI_UNLOCK(slot);
2182 struct sdhci_slot *slot = device_get_ivars(reqdev); local
2185 SDHCI_LOCK(slot);
2186 while (slot->bus_busy)
2187 msleep(slot, &slot->mtx, 0, "sdhciah", 0);
2188 slot->bus_busy++;
2190 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl |= SDHCI_CTRL_LED);
2191 SDHCI_UNLOCK(slot);
2198 struct sdhci_slot *slot = device_get_ivars(reqdev); local
2200 SDHCI_LOCK(slot);
2202 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl &= ~SDHCI_CTRL_LED);
2203 slot->bus_busy--;
2204 wakeup(slot);
2205 SDHCI_UNLOCK(slot);
2210 sdhci_cmd_irq(struct sdhci_slot *slot, uint32_t intmask) argument
2213 if (!slot->curcmd) {
2214 slot_printf(slot, "Got command interrupt 0x%08x, but "
2216 sdhci_dumpregs(slot);
2220 slot->curcmd->error = MMC_ERR_TIMEOUT;
2222 slot->curcmd->error = MMC_ERR_BADCRC;
2224 slot->curcmd->error = MMC_ERR_FIFO;
2226 sdhci_finish_command(slot);
2230 sdhci_data_irq(struct sdhci_slot *slot, uint32_t intmask) argument
2236 if (!slot->curcmd) {
2237 slot_printf(slot, "Got data interrupt 0x%08x, but "
2239 sdhci_dumpregs(slot);
2242 if (slot->curcmd->data == NULL &&
2243 (slot->curcmd->flags & MMC_RSP_BUSY) == 0) {
2244 slot_printf(slot, "Got data interrupt 0x%08x, but "
2247 sdhci_dumpregs(slot);
2251 slot->curcmd->error = MMC_ERR_TIMEOUT;
2253 slot->curcmd->error = MMC_ERR_BADCRC;
2254 if (slot->curcmd->data == NULL &&
2257 slot_printf(slot, "Got data interrupt 0x%08x, but "
2259 sdhci_dumpregs(slot);
2260 slot->curcmd->error = MMC_ERR_INVALID;
2262 if (slot->curcmd->error) {
2269 (slot->curcmd->opcode == MMC_SEND_TUNING_BLOCK ||
2270 slot->curcmd->opcode == MMC_SEND_TUNING_BLOCK_HS200))) {
2271 slot->req->flags |= MMC_TUNE_DONE;
2272 sdhci_finish_command(slot);
2273 sdhci_finish_data(slot);
2278 if ((slot->opt & SDHCI_PLATFORM_TRANSFER) &&
2279 SDHCI_PLATFORM_WILL_HANDLE(slot->bus, slot)) {
2280 SDHCI_PLATFORM_START_TRANSFER(slot->bus, slot,
2282 slot->flags |= PLATFORM_DATA_STARTED;
2284 sdhci_transfer_pio(slot);
2288 data = slot->curcmd->data;
2289 sdma_bbufsz = slot->sdma_bbufsz;
2292 left = data->len - slot->offset;
2294 bus_dmamap_sync(slot->dmatag, slot->dmamap,
2296 memcpy((u_char*)data->data + slot->offset, slot->dmamem,
2299 bus_dmamap_sync(slot->dmatag, slot->dmamap,
2303 slot->offset += sdma_bbufsz;
2304 left = data->len - slot->offset;
2306 bus_dmamap_sync(slot->dmatag, slot->dmamap,
2309 memcpy(slot->dmamem, (u_char*)data->data + slot->offset,
2311 bus_dmamap_sync(slot->dmatag, slot->dmamap,
2319 slot->intmask &= ~SDHCI_INT_DMA_END;
2320 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask);
2323 WR4(slot, SDHCI_DMA_ADDRESS, slot->paddr);
2327 if (slot->flags & PLATFORM_DATA_STARTED) {
2328 slot->flags &= ~PLATFORM_DATA_STARTED;
2329 SDHCI_PLATFORM_FINISH_TRANSFER(slot->bus, slot);
2331 sdhci_finish_data(slot);
2334 if (slot->curcmd != NULL && slot->curcmd->error != 0) {
2335 if (slot->flags & PLATFORM_DATA_STARTED) {
2336 slot->flags &= ~PLATFORM_DATA_STARTED;
2337 SDHCI_PLATFORM_FINISH_TRANSFER(slot->bus, slot);
2339 sdhci_finish_data(slot);
2344 sdhci_acmd_irq(struct sdhci_slot *slot, uint16_t acmd_err) argument
2347 if (!slot->curcmd) {
2348 slot_printf(slot, "Got AutoCMD12 error 0x%04x, but "
2350 sdhci_dumpregs(slot);
2353 slot_printf(slot, "Got AutoCMD12 error 0x%04x\n", acmd_err);
2354 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_CMD);
2358 sdhci_generic_intr(struct sdhci_slot *slot) argument
2363 SDHCI_LOCK(slot);
2364 /* Read slot interrupt status. */
2365 intmask = RD4(slot, SDHCI_INT_STATUS);
2367 SDHCI_UNLOCK(slot);
2371 slot_printf(slot, "Interrupt %#x\n", intmask);
2375 WR4(slot, SDHCI_INT_STATUS, SDHCI_INT_TUNEERR);
2376 slot_printf(slot, "Tuning error indicated\n");
2377 slot->retune_req |= SDHCI_RETUNE_REQ_RESET;
2378 if (slot->curcmd) {
2379 slot->curcmd->error = MMC_ERR_BADCRC;
2380 sdhci_finish_command(slot);
2385 slot->retune_req |= SDHCI_RETUNE_REQ_NEEDED;
2389 slot->intmask &=
2391 slot->intmask |= present ? SDHCI_INT_CARD_REMOVE :
2393 WR4(slot, SDHCI_INT_ENABLE, slot->intmask);
2394 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask);
2395 WR4(slot, SDHCI_INT_STATUS, intmask &
2397 sdhci_handle_card_present_locked(slot, present);
2401 WR4(slot, SDHCI_INT_STATUS, intmask & SDHCI_INT_CMD_MASK);
2402 sdhci_cmd_irq(slot, intmask & SDHCI_INT_CMD_MASK);
2406 WR4(slot, SDHCI_INT_STATUS, intmask & SDHCI_INT_DATA_MASK);
2409 sdhci_data_irq(slot, intmask & SDHCI_INT_DATA_MASK);
2414 val16 = RD2(slot, SDHCI_ACMD12_ERR);
2415 WR4(slot, SDHCI_INT_STATUS, SDHCI_INT_ACMD12ERR);
2416 sdhci_acmd_irq(slot, val16);
2420 WR4(slot, SDHCI_INT_STATUS, SDHCI_INT_BUS_POWER);
2421 slot_printf(slot, "Card is consuming too much power!\n");
2428 WR4(slot, SDHCI_INT_STATUS, intmask);
2429 slot_printf(slot, "Unexpected interrupt 0x%08x.\n",
2431 sdhci_dumpregs(slot);
2434 SDHCI_UNLOCK(slot);
2441 const struct sdhci_slot *slot = device_get_ivars(child); local
2447 *result = slot->host.ios.bus_mode;
2450 *result = slot->host.ios.bus_width;
2453 *result = slot->host.ios.chip_select;
2456 *result = slot->host.ios.clock;
2459 *result = slot->host.f_min;
2462 *result = slot->host.f_max;
2465 *result = slot->host.host_ocr;
2468 *result = slot->host.mode;
2471 *result = slot->host.ocr;
2474 *result = slot->host.ios.power_mode;
2477 *result = slot->host.ios.vdd;
2480 if (slot->opt & SDHCI_TUNING_ENABLED) {
2481 if (slot->retune_req & SDHCI_RETUNE_REQ_RESET) {
2485 if (slot->retune_req & SDHCI_RETUNE_REQ_NEEDED) {
2493 *result = slot->host.ios.vccq;
2496 *result = slot->host.caps;
2499 *result = slot->host.ios.timing;
2506 if (slot->opt & SDHCI_TUNING_ENABLED &&
2507 (slot->retune_mode == SDHCI_RETUNE_MODE_1 ||
2508 slot->retune_mode == SDHCI_RETUNE_MODE_2)) {
2528 struct sdhci_slot *slot = device_get_ivars(child); local
2533 slot_printf(slot, "%s: var=%d\n", __func__, which);
2538 slot->host.ios.bus_mode = value;
2541 slot->host.ios.bus_width = value;
2544 slot->host.ios.chip_select = value;
2548 max_clock = slot->max_clk;
2551 if (slot->version < SDHCI_SPEC_300) {
2567 slot->host.ios.clock = clock;
2569 slot->host.ios.clock = 0;
2572 slot->host.mode = value;
2575 slot->host.ocr = value;
2578 slot->host.ios.power_mode = value;
2581 slot->host.ios.vdd = value;
2584 slot->host.ios.vccq = value;
2587 slot->host.ios.timing = value;
2602 sdhci_start_slot(struct sdhci_slot *slot) argument
2605 if ((slot->devq = cam_simq_alloc(1)) == NULL)
2608 mtx_init(&slot->sim_mtx, "sdhcisim", NULL, MTX_DEF);
2609 slot->sim = cam_sim_alloc(sdhci_cam_action, sdhci_cam_poll,
2610 "sdhci_slot", slot, device_get_unit(slot->bus),
2611 &slot->sim_mtx, 1, 1, slot->devq);
2613 if (slot->sim == NULL) {
2614 cam_simq_free(slot->devq);
2615 slot_printf(slot, "cannot allocate CAM SIM\n");
2619 mtx_lock(&slot->sim_mtx);
2620 if (xpt_bus_register(slot->sim, slot->bus, 0) != 0) {
2621 slot_printf(slot, "cannot register SCSI pass-through bus\n");
2622 cam_sim_free(slot->sim, FALSE);
2623 cam_simq_free(slot->devq);
2624 mtx_unlock(&slot->sim_mtx);
2627 mtx_unlock(&slot->sim_mtx);
2630 slot->card_present = 0;
2631 sdhci_card_task(slot, 0);
2635 if (slot->sim != NULL) {
2636 mtx_lock(&slot->sim_mtx);
2637 xpt_bus_deregister(cam_sim_path(slot->sim));
2638 cam_sim_free(slot->sim, FALSE);
2639 mtx_unlock(&slot->sim_mtx);
2642 if (slot->devq != NULL)
2643 cam_simq_free(slot->devq);
2649 struct sdhci_slot *slot; local
2651 slot = cam_sim_softc(sim);
2652 if (slot == NULL) {
2658 mtx_assert(&slot->sim_mtx, MA_OWNED);
2672 slot_printf(slot, "Got XPT_GET_TRAN_SETTINGS\n");
2679 cts->proto_specific.mmc.host_ocr = slot->host.host_ocr;
2680 cts->proto_specific.mmc.host_f_min = slot->host.f_min;
2681 cts->proto_specific.mmc.host_f_max = slot->host.f_max;
2682 cts->proto_specific.mmc.host_caps = slot->host.caps;
2687 if (slot->opt & SDHCI_TUNING_ENABLED &&
2688 (slot->retune_mode == SDHCI_RETUNE_MODE_1 ||
2689 slot->retune_mode == SDHCI_RETUNE_MODE_2)) {
2696 memcpy(&cts->proto_specific.mmc.ios, &slot->host.ios, sizeof(struct mmc_ios));
2703 slot_printf(slot, "Got XPT_SET_TRAN_SETTINGS\n");
2704 sdhci_cam_settran_settings(slot, ccb);
2709 slot_printf(slot, "Got XPT_RESET_BUS, ACK it...\n");
2720 slot_printf(slot, "Got XPT_MMC_IO\n");
2740 sdhci_cam_get_possible_host_clock(const struct sdhci_slot *slot, argument
2747 max_clock = slot->max_clk;
2750 if (slot->version < SDHCI_SPEC_300) {
2767 sdhci_cam_settran_settings(struct sdhci_slot *slot, union ccb *ccb) argument
2773 ios = &slot->host.ios;
2779 ios->clock = sdhci_cam_get_possible_host_clock(slot, new_ios->clock);
2781 slot_printf(slot, "Clock => %d\n", ios->clock);
2786 slot_printf(slot, "VDD => %d\n", ios->vdd);
2791 slot_printf(slot, "CS => %d\n", ios->chip_select);
2796 slot_printf(slot, "Bus width => %d\n", ios->bus_width);
2801 slot_printf(slot, "Power mode => %d\n", ios->power_mode);
2806 slot_printf(slot, "Timing => %d\n", ios->timing);
2811 slot_printf(slot, "Bus mode => %d\n", ios->bus_mode);
2816 slot_printf(slot, "VCCQ => %d\n", ios->vccq);
2820 return (sdhci_cam_update_ios(slot));
2824 sdhci_cam_update_ios(struct sdhci_slot *slot) argument
2826 struct mmc_ios *ios = &slot->host.ios;
2829 slot_printf(slot, "%s: power_mode=%d, clk=%d, bus_width=%d, timing=%d\n",
2831 SDHCI_LOCK(slot);
2834 WR4(slot, SDHCI_SIGNAL_ENABLE, 0);
2835 sdhci_init(slot);
2838 sdhci_set_clock(slot, ios->clock);
2839 sdhci_set_power(slot, (ios->power_mode == power_off) ? 0 : ios->vdd);
2841 slot->hostctrl |= SDHCI_CTRL_8BITBUS;
2842 slot->hostctrl &= ~SDHCI_CTRL_4BITBUS;
2844 slot->hostctrl &= ~SDHCI_CTRL_8BITBUS;
2845 slot->hostctrl |= SDHCI_CTRL_4BITBUS;
2847 slot->hostctrl &= ~SDHCI_CTRL_8BITBUS;
2848 slot->hostctrl &= ~SDHCI_CTRL_4BITBUS;
2853 !(slot->quirks & SDHCI_QUIRK_DONT_SET_HISPD_BIT))
2854 slot->hostctrl |= SDHCI_CTRL_HISPD;
2856 slot->hostctrl &= ~SDHCI_CTRL_HISPD;
2857 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl);
2859 if(slot->quirks & SDHCI_QUIRK_RESET_ON_IOS)
2860 SDHCI_RESET(slot->bus, slot,
2863 SDHCI_UNLOCK(slot);
2868 sdhci_cam_request(struct sdhci_slot *slot, union ccb *ccb) argument
2874 SDHCI_LOCK(slot);
2875 /* if (slot->req != NULL) {
2876 SDHCI_UNLOCK(slot);
2881 slot_printf(slot, "CMD%u arg %#x flags %#x dlen %u dflags %#x "
2894 slot->ccb = ccb;
2895 slot->flags = 0;
2896 sdhci_start(slot);
2897 SDHCI_UNLOCK(slot);