Lines Matching +full:hs200 +full:- +full:cmd +full:- +full:int +full:- +full:delay
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
71 static int sdhci_debug = 0;
81 #define RD1(slot, off) SDHCI_READ_1((slot)->bus, (slot), (off))
82 #define RD2(slot, off) SDHCI_READ_2((slot)->bus, (slot), (off))
83 #define RD4(slot, off) SDHCI_READ_4((slot)->bus, (slot), (off))
85 SDHCI_READ_MULTI_4((slot)->bus, (slot), (off), (ptr), (count))
87 #define WR1(slot, off, val) SDHCI_WRITE_1((slot)->bus, (slot), (off), (val))
88 #define WR2(slot, off, val) SDHCI_WRITE_2((slot)->bus, (slot), (off), (val))
89 #define WR4(slot, off, val) SDHCI_WRITE_4((slot)->bus, (slot), (off), (val))
91 SDHCI_WRITE_MULTI_4((slot)->bus, (slot), (off), (ptr), (count))
95 static void sdhci_card_task(void *arg, int pending);
98 static int sdhci_exec_tuning(struct sdhci_slot *slot, bool reset);
114 struct mmc_command *cmd);
121 /* CAM-related */
123 static int sdhci_cam_get_possible_host_clock(const struct sdhci_slot *slot,
124 int proposed_clock);
126 static int sdhci_cam_request(struct sdhci_slot *slot, union ccb *ccb);
127 static int sdhci_cam_settran_settings(struct sdhci_slot *slot, union ccb *ccb);
128 static int sdhci_cam_update_ios(struct sdhci_slot *slot);
132 static int sdhci_dma_alloc(struct sdhci_slot *slot);
138 static int sdhci_syctl_dumpcaps(SYSCTL_HANDLER_ARGS);
139 static int sdhci_syctl_dumpregs(SYSCTL_HANDLER_ARGS);
140 static void sdhci_getaddr(void *arg, bus_dma_segment_t *segs, int nsegs,
141 int error);
142 static int slot_printf(const struct sdhci_slot *slot, const char * fmt, ...)
144 static int slot_sprintf(const struct sdhci_slot *slot, struct sbuf *s,
148 #define SDHCI_LOCK(_slot) mtx_lock(&(_slot)->mtx)
149 #define SDHCI_UNLOCK(_slot) mtx_unlock(&(_slot)->mtx)
151 mtx_init(&_slot->mtx, "SD slot mtx", "sdhci", MTX_DEF)
152 #define SDHCI_LOCK_DESTROY(_slot) mtx_destroy(&_slot->mtx);
153 #define SDHCI_ASSERT_LOCKED(_slot) mtx_assert(&_slot->mtx, MA_OWNED);
154 #define SDHCI_ASSERT_UNLOCKED(_slot) mtx_assert(&_slot->mtx, MA_NOTOWNED);
179 sdhci_getaddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) in sdhci_getaddr()
189 static int
194 int retval; in slot_printf()
204 retval += printf("%s-slot%d: %s", in slot_printf()
205 device_get_nameunit(slot->bus), slot->num, buf); in slot_printf()
209 static int
214 int retval; in slot_sprintf()
216 retval = sbuf_printf(s, "%s-slot%d: ", device_get_nameunit(slot->bus), slot->num); in slot_sprintf()
240 slot_sprintf(slot, s, "Wake-up: 0x%08x | Clock: 0x%08x\n", in sdhci_dumpregs_buf()
242 slot_sprintf(slot, s, "Timeout: 0x%08x | Int stat: 0x%08x\n", in sdhci_dumpregs_buf()
244 slot_sprintf(slot, s, "Int enab: 0x%08x | Sig enab: 0x%08x\n", in sdhci_dumpregs_buf()
252 slot_sprintf(slot, s, "ADMA addr:0x%08x | Slot int: 0x%08x\n", in sdhci_dumpregs_buf()
274 static int
292 int host_caps = slot->host.caps; in sdhci_dumpcaps_buf()
293 int caps = slot->caps; in sdhci_dumpcaps_buf()
297 slot->max_clk / 1000000, in sdhci_dumpcaps_buf()
304 (slot->opt & SDHCI_SLOT_EMBEDDED)) ? " 1.8V" : "", in sdhci_dumpcaps_buf()
310 (slot->opt & SDHCI_HAVE_DMA) ? "DMA" : "PIO", in sdhci_dumpcaps_buf()
311 (slot->opt & SDHCI_SLOT_EMBEDDED) ? "embedded" : in sdhci_dumpcaps_buf()
312 (slot->opt & SDHCI_NON_REMOVABLE) ? "non-removable" : in sdhci_dumpcaps_buf()
318 (host_caps & MMC_CAP_MMC_HS200) ? " HS200" : "", in sdhci_dumpcaps_buf()
326 slot_sprintf(slot, s, "UHS-I:%s%s%s%s%s\n", in sdhci_dumpcaps_buf()
332 if (slot->opt & SDHCI_TUNING_SUPPORTED) in sdhci_dumpcaps_buf()
334 "Re-tuning count %d secs, mode %d\n", in sdhci_dumpcaps_buf()
335 slot->retune_count, slot->retune_mode + 1); in sdhci_dumpcaps_buf()
354 static int
375 if (slot->opt & SDHCI_TUNING_ENABLED) { in sdhci_tuning_intmask()
377 if (slot->retune_mode == SDHCI_RETUNE_MODE_2 || in sdhci_tuning_intmask()
378 slot->retune_mode == SDHCI_RETUNE_MODE_3) in sdhci_tuning_intmask()
388 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_ALL); in sdhci_init()
391 slot->intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | in sdhci_init()
398 if (!(slot->quirks & SDHCI_QUIRK_POLL_CARD_PRESENT) && in sdhci_init()
399 !(slot->opt & SDHCI_NON_REMOVABLE)) { in sdhci_init()
400 slot->intmask |= SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT; in sdhci_init()
403 WR4(slot, SDHCI_INT_ENABLE, slot->intmask); in sdhci_init()
404 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask); in sdhci_init()
415 int timeout; in sdhci_set_clock()
417 if (clock == slot->clock) in sdhci_set_clock()
419 clock = SDHCI_SET_CLOCK(slot->bus, slot, clock); in sdhci_set_clock()
420 slot->clock = clock; in sdhci_set_clock()
425 /* If no clock requested - leave it so. */ in sdhci_set_clock()
430 clk_base = slot->max_clk; in sdhci_set_clock()
431 if (slot->quirks & SDHCI_QUIRK_BCM577XX_400KHZ_CLKSRC) { in sdhci_set_clock()
451 if (slot->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) in sdhci_set_clock()
452 slot->timeout_clk = slot->clock / 1000; in sdhci_set_clock()
454 if (slot->version < SDHCI_SPEC_300) { in sdhci_set_clock()
500 timeout--; in sdhci_set_clock()
501 DELAY(1000); in sdhci_set_clock()
511 int i; in sdhci_set_power()
514 if (slot->power == power) in sdhci_set_power()
517 slot->power = power; in sdhci_set_power()
522 /* If power down requested - leave it so. */ in sdhci_set_power()
550 DELAY(100); in sdhci_set_power()
555 if (slot->quirks & SDHCI_QUIRK_INTEL_POWER_UP_RESET) { in sdhci_set_power()
557 DELAY(10); in sdhci_set_power()
559 DELAY(300); in sdhci_set_power()
570 buffer = slot->curcmd->data->data; in sdhci_read_block_pio()
571 buffer += slot->offset; in sdhci_read_block_pio()
574 if (slot->curcmd->data->flags & MMC_DATA_BLOCK_SIZE) in sdhci_read_block_pio()
575 left = min(slot->curcmd->data->block_size, in sdhci_read_block_pio()
576 slot->curcmd->data->len - slot->offset); in sdhci_read_block_pio()
579 left = min(512, slot->curcmd->data->len - slot->offset); in sdhci_read_block_pio()
580 slot->offset += left; in sdhci_read_block_pio()
583 if (slot->quirks & SDHCI_QUIRK_BROKEN_TIMINGS) in sdhci_read_block_pio()
584 DELAY(10); in sdhci_read_block_pio()
594 left -= 4; in sdhci_read_block_pio()
607 left--; in sdhci_read_block_pio()
619 buffer = slot->curcmd->data->data; in sdhci_write_block_pio()
620 buffer += slot->offset; in sdhci_write_block_pio()
623 if (slot->curcmd->data->flags & MMC_DATA_BLOCK_SIZE) { in sdhci_write_block_pio()
624 left = min(slot->curcmd->data->block_size, in sdhci_write_block_pio()
625 slot->curcmd->data->len - slot->offset); in sdhci_write_block_pio()
628 left = min(512, slot->curcmd->data->len - slot->offset); in sdhci_write_block_pio()
629 slot->offset += left; in sdhci_write_block_pio()
638 left -= 4; in sdhci_write_block_pio()
652 left--; in sdhci_write_block_pio()
663 if (slot->curcmd->data->flags & MMC_DATA_READ) { in sdhci_transfer_pio()
667 if (slot->offset >= slot->curcmd->data->len) in sdhci_transfer_pio()
674 if (slot->offset >= slot->curcmd->data->len) in sdhci_transfer_pio()
681 sdhci_card_task(void *arg, int pending __unused)
689 if (SDHCI_GET_CARD_PRESENT(slot->bus, slot)) {
691 if (slot->card_present == 0) {
693 if (slot->dev == NULL) {
695 /* If card is present - attach mmc bus. */
699 slot->card_present = 1;
700 mmccam_start_discovery(slot->sim);
705 d = slot->dev = device_add_child(slot->bus, "mmc", DEVICE_UNIT_ANY);
716 if (slot->card_present == 1) {
718 if (slot->dev != NULL) {
719 d = slot->dev;
721 /* If no card present - detach mmc bus. */
724 slot->dev = NULL;
726 slot->card_present = 0;
727 mmccam_start_discovery(slot->sim);
730 slot->intmask &= ~sdhci_tuning_intmask(slot);
731 WR4(slot, SDHCI_INT_ENABLE, slot->intmask);
732 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask);
733 slot->opt &= ~SDHCI_TUNING_ENABLED;
735 callout_drain(&slot->retune_callout);
737 device_delete_child(slot->bus, d);
752 * create the child device after a short delay. The delay is to
757 * the task to delete the child device. No debouncing -- gone is gone,
758 * because once power is removed, a full card re-init is needed, and
762 was_present = slot->card_present;
764 was_present = slot->dev != NULL;
768 &slot->card_delayed_task, -SDHCI_INSERT_DELAY_TICKS);
770 taskqueue_enqueue(taskqueue_bus, &slot->card_task);
789 SDHCI_GET_CARD_PRESENT(slot->bus, slot));
790 callout_reset(&slot->card_poll_callout, SDHCI_CARD_PRESENT_TICKS,
794 static int
797 int err;
799 if (!(slot->quirks & SDHCI_QUIRK_BROKEN_SDMA_BOUNDARY)) {
801 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_4K;
803 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_8K;
805 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_16K;
807 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_32K;
809 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_64K;
811 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_128K;
813 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_256K;
815 slot->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_512K;
817 slot->sdma_bbufsz = SDHCI_SDMA_BNDRY_TO_BBUFSZ(slot->sdma_boundary);
827 err = bus_dma_tag_create(bus_get_dma_tag(slot->bus), slot->sdma_bbufsz,
829 slot->sdma_bbufsz, 1, slot->sdma_bbufsz, BUS_DMA_ALLOCNOW,
830 NULL, NULL, &slot->dmatag);
836 err = bus_dmamem_alloc(slot->dmatag, (void **)&slot->dmamem,
837 BUS_DMA_NOWAIT, &slot->dmamap);
840 bus_dma_tag_destroy(slot->dmatag);
844 err = bus_dmamap_load(slot->dmatag, slot->dmamap,
845 (void *)slot->dmamem, slot->sdma_bbufsz, sdhci_getaddr,
846 &slot->paddr, 0);
847 if (err != 0 || slot->paddr == 0) {
849 bus_dmamem_free(slot->dmatag, slot->dmamem, slot->dmamap);
850 bus_dma_tag_destroy(slot->dmatag);
864 bus_dmamap_unload(slot->dmatag, slot->dmamap);
865 bus_dmamem_free(slot->dmatag, slot->dmamem, slot->dmamap);
866 bus_dma_tag_destroy(slot->dmatag);
869 int
870 sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num)
875 int err;
881 slot->num = num;
882 slot->bus = dev;
884 slot->version = (RD2(slot, SDHCI_HOST_VERSION)
886 if (slot->quirks & SDHCI_QUIRK_MISSING_CAPS) {
887 caps = slot->caps;
888 caps2 = slot->caps2;
891 if (slot->version >= SDHCI_SPEC_300)
896 if (slot->version >= SDHCI_SPEC_300) {
905 slot->opt |= SDHCI_SLOT_EMBEDDED | SDHCI_NON_REMOVABLE;
909 if (slot->version >= SDHCI_SPEC_300)
916 slot->max_clk = freq * 1000000;
922 if (slot->max_clk == 0) {
923 slot->max_clk = SDHCI_DEFAULT_MAX_FREQ * 1000000;
929 if (slot->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) {
930 slot->timeout_clk = slot->max_clk / 1000;
931 } else if (slot->quirks & SDHCI_QUIRK_DATA_TIMEOUT_1MHZ) {
932 slot->timeout_clk = 1000;
934 slot->timeout_clk = (caps & SDHCI_TIMEOUT_CLK_MASK) >>
937 slot->timeout_clk *= 1000;
944 if (slot->timeout_clk == 0) {
947 slot->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
950 slot->host.f_min = SDHCI_MIN_FREQ(slot->bus, slot);
951 slot->host.f_max = slot->max_clk;
952 slot->host.host_ocr = 0;
954 slot->host.host_ocr |= MMC_OCR_320_330 | MMC_OCR_330_340;
956 slot->host.host_ocr |= MMC_OCR_290_300 | MMC_OCR_300_310;
960 * sometimes support 1.8v for non-removable devices.
962 if ((caps & SDHCI_CAN_VDD_180) && (slot->version < SDHCI_SPEC_300 ||
963 (slot->opt & SDHCI_SLOT_EMBEDDED)))
964 slot->host.host_ocr |= MMC_OCR_LOW_VOLTAGE;
965 if (slot->host.host_ocr == 0) {
970 host_caps = slot->host.caps;
976 if (slot->quirks & SDHCI_QUIRK_BOOT_NOACC)
978 if (slot->quirks & SDHCI_QUIRK_WAIT_WHILE_BUSY)
981 /* Determine supported UHS-I and eMMC modes. */
986 if (!(slot->quirks & SDHCI_QUIRK_BROKEN_MMC_HS200))
991 !(slot->quirks & SDHCI_QUIRK_BROKEN_UHS_DDR50))
993 if (slot->quirks & SDHCI_QUIRK_MMC_DDR52)
995 if (slot->quirks & SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 &&
998 if (slot->quirks & SDHCI_QUIRK_MMC_HS400_IF_CAN_SDR104 &&
1003 * Disable UHS-I and eMMC modes if the set_uhs_timing method is the
1007 kobj_method = kobj_lookup_method(((kobj_t)dev)->ops->cls, NULL,
1009 if (kobj_method == &kobj_desc->deflt)
1020 * Disable UHS-I and eMMC modes that require (re-)tuning if either
1021 * the tune or re-tune method is the default NULL implementation.
1024 kobj_method = kobj_lookup_method(((kobj_t)dev)->ops->cls, NULL,
1026 if (kobj_method == &kobj_desc->deflt)
1029 kobj_method = kobj_lookup_method(((kobj_t)dev)->ops->cls, NULL,
1031 if (kobj_method == &kobj_desc->deflt) {
1038 slot->opt |= SDHCI_TUNING_SUPPORTED;
1039 slot->tune_req = malloc(sizeof(*slot->tune_req), M_DEVBUF,
1041 slot->tune_cmd = malloc(sizeof(*slot->tune_cmd), M_DEVBUF,
1043 slot->tune_data = malloc(sizeof(*slot->tune_data), M_DEVBUF,
1046 slot->opt |= SDHCI_SDR50_NEEDS_TUNING;
1047 slot->retune_mode = (caps2 & SDHCI_RETUNE_MODES_MASK) >>
1049 if (slot->retune_mode == SDHCI_RETUNE_MODE_1) {
1050 slot->retune_count = (caps2 & SDHCI_RETUNE_CNT_MASK) >>
1052 if (slot->retune_count > 0xb) {
1053 slot_printf(slot, "Unknown re-tuning count "
1054 "%x, using 1 sec\n", slot->retune_count);
1055 slot->retune_count = 1;
1056 } else if (slot->retune_count != 0)
1057 slot->retune_count =
1058 1 << (slot->retune_count - 1);
1078 kobj_method = kobj_lookup_method(((kobj_t)dev)->ops->cls, NULL,
1080 if (kobj_method == &kobj_desc->deflt)
1082 else if (kobj_method->func == (kobjop_t)sdhci_generic_switch_vccq)
1092 slot->host.caps = host_caps;
1096 slot->opt |= SDHCI_HAVE_DMA;
1098 if (slot->quirks & SDHCI_QUIRK_BROKEN_DMA)
1099 slot->opt &= ~SDHCI_HAVE_DMA;
1100 if (slot->quirks & SDHCI_QUIRK_FORCE_DMA)
1101 slot->opt |= SDHCI_HAVE_DMA;
1102 if (slot->quirks & SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE)
1103 slot->opt |= SDHCI_NON_REMOVABLE;
1106 * Use platform-provided transfer backend
1109 if (slot->opt & SDHCI_PLATFORM_TRANSFER)
1110 slot->opt &= ~SDHCI_HAVE_DMA;
1112 if (slot->opt & SDHCI_HAVE_DMA) {
1115 if (slot->opt & SDHCI_TUNING_SUPPORTED) {
1116 free(slot->tune_req, M_DEVBUF);
1117 free(slot->tune_cmd, M_DEVBUF);
1118 free(slot->tune_data, M_DEVBUF);
1130 slot->timeout = 10;
1131 SYSCTL_ADD_INT(device_get_sysctl_ctx(slot->bus),
1132 SYSCTL_CHILDREN(device_get_sysctl_tree(slot->bus)), OID_AUTO,
1133 "timeout", CTLFLAG_RWTUN, &slot->timeout, 0,
1135 TASK_INIT(&slot->card_task, 0, sdhci_card_task, slot);
1136 TIMEOUT_TASK_INIT(taskqueue_bus, &slot->card_delayed_task, 0,
1138 callout_init(&slot->card_poll_callout, 1);
1139 callout_init_mtx(&slot->timeout_callout, &slot->mtx, 0);
1140 callout_init_mtx(&slot->retune_callout, &slot->mtx, 0);
1142 if ((slot->quirks & SDHCI_QUIRK_POLL_CARD_PRESENT) &&
1143 !(slot->opt & SDHCI_NON_REMOVABLE)) {
1144 callout_reset(&slot->card_poll_callout,
1150 snprintf(node_name, sizeof(node_name), "slot%d", slot->num);
1157 OID_AUTO, "quirks", CTLFLAG_RD, &slot->quirks, 0, "Slot quirks");
1185 int
1190 callout_drain(&slot->timeout_callout);
1191 callout_drain(&slot->card_poll_callout);
1192 callout_drain(&slot->retune_callout);
1193 taskqueue_drain(taskqueue_bus, &slot->card_task);
1194 taskqueue_drain_timeout(taskqueue_bus, &slot->card_delayed_task);
1197 d = slot->dev;
1198 slot->dev = NULL;
1201 device_delete_child(slot->bus, d);
1204 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_ALL);
1206 if (slot->opt & SDHCI_HAVE_DMA)
1208 if (slot->opt & SDHCI_TUNING_SUPPORTED) {
1209 free(slot->tune_req, M_DEVBUF);
1210 free(slot->tune_cmd, M_DEVBUF);
1211 free(slot->tune_data, M_DEVBUF);
1219 int
1225 * Otherwise, we'd need to indicate re-tuning including circuit reset
1226 * being required at least for re-tuning modes 1 and 2 ourselves.
1228 callout_drain(&slot->retune_callout);
1230 slot->opt &= ~SDHCI_TUNING_ENABLED;
1231 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_ALL);
1237 int
1252 int timeout;
1255 if (slot->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
1256 if (!SDHCI_GET_CARD_PRESENT(slot->bus, slot))
1262 (slot->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET)) {
1264 clock = slot->clock;
1265 slot->clock = 0;
1270 slot->clock = 0;
1271 slot->power = 0;
1276 if (slot->quirks & SDHCI_QUIRK_WAITFOR_RESET_ASSERTED) {
1279 * specification. The reset bit has internal propagation delay,
1289 timeout--;
1290 DELAY(1);
1304 timeout--;
1305 DELAY(10);
1313 if (slot->version >= SDHCI_SPEC_300)
1314 return (slot->max_clk / SDHCI_300_MAX_DIVIDER);
1316 return (slot->max_clk / SDHCI_200_MAX_DIVIDER);
1323 if (slot->opt & SDHCI_NON_REMOVABLE)
1335 if (slot->version < SDHCI_SPEC_300)
1339 ios = &slot->host.ios;
1343 if (ios->clock > SD_SDR50_MAX) {
1344 if (ios->timing == bus_timing_mmc_hs400 ||
1345 ios->timing == bus_timing_mmc_hs400es)
1350 else if (ios->clock > SD_SDR25_MAX)
1352 else if (ios->clock > SD_SDR12_MAX) {
1353 if (ios->timing == bus_timing_uhs_ddr50 ||
1354 ios->timing == bus_timing_mmc_ddr52)
1358 } else if (ios->clock > SD_MMC_CARD_ID_FREQUENCY)
1361 sdhci_set_clock(slot, ios->clock);
1364 int
1368 struct mmc_ios *ios = &slot->host.ios;
1372 if (ios->power_mode == power_off) {
1377 sdhci_set_clock(slot, ios->clock);
1378 sdhci_set_power(slot, (ios->power_mode == power_off) ? 0 : ios->vdd);
1379 if (ios->bus_width == bus_width_8) {
1380 slot->hostctrl |= SDHCI_CTRL_8BITBUS;
1381 slot->hostctrl &= ~SDHCI_CTRL_4BITBUS;
1382 } else if (ios->bus_width == bus_width_4) {
1383 slot->hostctrl &= ~SDHCI_CTRL_8BITBUS;
1384 slot->hostctrl |= SDHCI_CTRL_4BITBUS;
1385 } else if (ios->bus_width == bus_width_1) {
1386 slot->hostctrl &= ~SDHCI_CTRL_8BITBUS;
1387 slot->hostctrl &= ~SDHCI_CTRL_4BITBUS;
1389 panic("Invalid bus width: %d", ios->bus_width);
1391 if (ios->clock > SD_SDR12_MAX &&
1392 !(slot->quirks & SDHCI_QUIRK_DONT_SET_HISPD_BIT))
1393 slot->hostctrl |= SDHCI_CTRL_HISPD;
1395 slot->hostctrl &= ~SDHCI_CTRL_HISPD;
1396 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl);
1399 if (slot->quirks & SDHCI_QUIRK_RESET_ON_IOS)
1400 SDHCI_RESET(slot->bus, slot,
1407 int
1412 int err;
1415 if (slot->version < SDHCI_SPEC_300)
1419 vccq = slot->host.ios.vccq;
1429 DELAY(5000);
1436 if (!(slot->host.caps & MMC_CAP_SIGNALING_180)) {
1444 DELAY(5000);
1457 sdhci_set_clock(slot, slot->host.ios.clock);
1462 int
1466 const struct mmc_ios *ios = &slot->host.ios;
1470 int err;
1472 if (!(slot->opt & SDHCI_TUNING_SUPPORTED))
1475 slot->retune_ticks = slot->retune_count * hz;
1478 switch (ios->timing) {
1480 slot_printf(slot, "HS400 must be tuned in HS200 mode\n");
1486 * latch data from the devices so periodic re-tuning isn't
1490 slot->retune_ticks = 0;
1497 if (slot->opt & SDHCI_SDR50_NEEDS_TUNING)
1507 tune_cmd = slot->tune_cmd;
1509 tune_cmd->opcode = opcode;
1510 tune_cmd->flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1511 tune_data = tune_cmd->data = slot->tune_data;
1513 tune_data->len = (opcode == MMC_SEND_TUNING_BLOCK_HS200 &&
1514 ios->bus_width == bus_width_8) ? MMC_TUNING_LEN_HS200 :
1516 tune_data->flags = MMC_DATA_READ;
1517 tune_data->mrq = tune_cmd->mrq = slot->tune_req;
1519 slot->opt &= ~SDHCI_TUNING_ENABLED;
1522 slot->opt |= SDHCI_TUNING_ENABLED;
1523 slot->intmask |= sdhci_tuning_intmask(slot);
1524 WR4(slot, SDHCI_INT_ENABLE, slot->intmask);
1525 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask);
1526 if (slot->retune_ticks) {
1527 callout_reset(&slot->retune_callout, slot->retune_ticks,
1535 int
1539 int err;
1541 if (!(slot->opt & SDHCI_TUNING_ENABLED))
1544 /* HS400 must be tuned in HS200 mode. */
1545 if (slot->host.ios.timing == bus_timing_mmc_hs400)
1554 * EIO re-tuning failed (but it did work initially).
1556 * In both cases, we should retry at later point if periodic re-tuning
1557 * is enabled. Note that due to slot->retune_req not being cleared in
1559 * re-tuning with the next request anyway, though.
1561 if (slot->retune_ticks) {
1562 callout_reset(&slot->retune_callout, slot->retune_ticks,
1569 static int
1574 int i;
1580 if (slot->req != NULL)
1584 opt = slot->opt;
1585 slot->opt = opt & ~SDHCI_HAVE_DMA;
1591 intmask = slot->intmask;
1592 slot->intmask = SDHCI_INT_DATA_AVAIL;
1603 tune_req = slot->tune_req;
1604 tune_cmd = slot->tune_cmd;
1607 tune_req->cmd = tune_cmd;
1608 tune_req->done = sdhci_req_wakeup;
1609 tune_req->done_data = slot;
1610 slot->req = tune_req;
1611 slot->flags = 0;
1613 while (!(tune_req->flags & MMC_REQ_DONE))
1614 msleep(tune_req, &slot->mtx, 0, "sdhciet", 0);
1615 if (!(tune_req->flags & MMC_TUNE_DONE))
1620 if (tune_cmd->opcode == MMC_SEND_TUNING_BLOCK)
1621 DELAY(1000);
1627 * SDHCI_INT_DMA_END and/or SDHCI_INT_RESPONSE in slot->intmask
1631 slot->opt = opt;
1632 slot->intmask = intmask;
1639 slot->retune_req = 0;
1646 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
1655 slot->retune_req |= SDHCI_RETUNE_REQ_NEEDED;
1666 if (slot->ccb != NULL && slot->curcmd != NULL) {
1667 callout_stop(&slot->timeout_callout);
1668 ccb = slot->ccb;
1669 slot->ccb = NULL;
1670 slot->curcmd = NULL;
1674 mmcio = &ccb->mmcio;
1676 ccb->ccb_h.status =
1677 (mmcio->cmd.error == 0 ? CAM_REQ_CMP : CAM_REQ_CMP_ERR);
1687 if (slot->req != NULL && slot->curcmd != NULL) {
1688 callout_stop(&slot->timeout_callout);
1689 req = slot->req;
1690 slot->req = NULL;
1691 slot->curcmd = NULL;
1692 req->done(req);
1701 req->flags |= MMC_REQ_DONE;
1710 if (slot->curcmd != NULL) {
1713 SDHCI_RESET(slot->bus, slot,
1715 slot->curcmd->error = MMC_ERR_TIMEOUT;
1718 slot_printf(slot, "Spurious timeout - no active command\n");
1731 if (data->len > 512 || data->block_count > 1) {
1733 if (data->block_count == 0 && __predict_true(
1735 slot->ccb->mmcio.stop.opcode == MMC_STOP_TRANSMISSION &&
1737 slot->req->stop != NULL &&
1739 !(slot->quirks & SDHCI_QUIRK_BROKEN_AUTO_STOP)))
1742 if (data->flags & MMC_DATA_READ)
1744 if (slot->flags & SDHCI_USE_DMA)
1751 sdhci_start_command(struct sdhci_slot *slot, struct mmc_command *cmd) argument
1753 int flags, timeout;
1756 slot->curcmd = cmd;
1757 slot->cmd_done = 0;
1759 cmd->error = MMC_ERR_NONE;
1762 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
1764 cmd->error = MMC_ERR_FAILED;
1773 if (!SDHCI_GET_CARD_PRESENT(slot->bus, slot) ||
1774 slot->power == 0 ||
1775 slot->clock == 0) {
1778 slot->power, slot->clock);
1779 cmd->error = MMC_ERR_FAILED;
1783 /* Always wait for free CMD bus. */
1786 if (cmd->data != NULL || (cmd->flags & MMC_RSP_BUSY))
1794 if (cmd == &slot->ccb->mmcio.stop ||
1796 if (cmd == slot->req->stop ||
1798 __predict_false(cmd->opcode == MMC_SEND_TUNING_BLOCK ||
1799 cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200))
1806 * busy indications. In those cases, this wait-loop serves the purpose
1809 * (It's usually more like 20-30ms in the real world.)
1817 cmd->error = MMC_ERR_FAILED;
1821 timeout--;
1822 DELAY(1000);
1826 if (!(cmd->flags & MMC_RSP_PRESENT))
1828 else if (cmd->flags & MMC_RSP_136)
1830 else if (cmd->flags & MMC_RSP_BUSY)
1834 if (cmd->flags & MMC_RSP_CRC)
1836 if (cmd->flags & MMC_RSP_OPCODE)
1838 if (cmd->data != NULL)
1840 if (cmd->opcode == MMC_STOP_TRANSMISSION)
1843 sdhci_start_data(slot, cmd->data);
1849 if (slot->data_done == 0) {
1851 slot->intmask &= ~SDHCI_INT_RESPONSE);
1854 WR4(slot, SDHCI_ARGUMENT, cmd->arg);
1856 sdhci_set_transfer_mode(slot, cmd->data);
1859 cmd->opcode, flags);
1862 WR2(slot, SDHCI_COMMAND_FLAGS, (cmd->opcode << 8) | (flags & 0xff));
1864 callout_reset(&slot->timeout_callout, slot->timeout * hz,
1871 int i;
1877 __func__, slot->curcmd->error, slot->curcmd->flags);
1878 slot->cmd_done = 1;
1884 if (__predict_true(slot->curcmd->opcode != MMC_SEND_TUNING_BLOCK &&
1885 slot->curcmd->opcode != MMC_SEND_TUNING_BLOCK_HS200))
1886 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask |=
1888 /* In case of error - reset host and return. */
1889 if (slot->curcmd->error) {
1890 if (slot->curcmd->error == MMC_ERR_BADCRC)
1891 slot->retune_req |= SDHCI_RETUNE_REQ_RESET;
1892 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_CMD);
1893 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_DATA);
1897 /* If command has response - fetch it. */
1898 if (slot->curcmd->flags & MMC_RSP_PRESENT) {
1899 if (slot->curcmd->flags & MMC_RSP_136) {
1904 if (slot->quirks &
1906 slot->curcmd->resp[3 - i] = val;
1908 slot->curcmd->resp[3 - i] =
1914 slot->curcmd->resp[0] = RD4(slot, SDHCI_RESPONSE);
1918 slot->curcmd->resp[0], slot->curcmd->resp[1],
1919 slot->curcmd->resp[2], slot->curcmd->resp[3]);
1921 /* If data ready - finish. */
1922 if (slot->data_done)
1932 if (data == NULL && (slot->curcmd->flags & MMC_RSP_BUSY) == 0) {
1933 slot->data_done = 1;
1937 slot->data_done = 0;
1941 if (slot->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) {
1946 current_timeout = (1 << 13) * 1000 / slot->timeout_clk;
1951 /* Compensate for an off-by-one error in the CaFe chip.*/
1953 (slot->quirks & SDHCI_QUIRK_INCR_TIMEOUT_CONTROL)) {
1963 if ((slot->opt & SDHCI_HAVE_DMA))
1964 slot->flags |= SDHCI_USE_DMA;
1966 if ((slot->quirks & SDHCI_QUIRK_BROKEN_TIMINGS) &&
1967 (data->len <= 512))
1968 slot->flags &= ~SDHCI_USE_DMA;
1970 if ((slot->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) &&
1971 ((data->len) & 0x3))
1972 slot->flags &= ~SDHCI_USE_DMA;
1974 if (slot->flags & SDHCI_USE_DMA) {
1975 sdma_bbufsz = slot->sdma_bbufsz;
1976 if (data->flags & MMC_DATA_READ)
1977 bus_dmamap_sync(slot->dmatag, slot->dmamap,
1980 memcpy(slot->dmamem, data->data, ulmin(data->len,
1982 bus_dmamap_sync(slot->dmatag, slot->dmamap,
1985 WR4(slot, SDHCI_DMA_ADDRESS, slot->paddr);
1990 if (data->len == sdma_bbufsz)
1991 slot->intmask &= ~SDHCI_INT_DMA_END;
1993 slot->intmask |= SDHCI_INT_DMA_END;
1994 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask);
1997 slot->offset = 0;
1999 if (data->flags & MMC_DATA_BLOCK_SIZE) {
2001 blksz = SDHCI_MAKE_BLKSZ(slot->sdma_boundary, data->block_size);
2002 blkcnt = data->block_count;
2010 blksz = SDHCI_MAKE_BLKSZ(slot->sdma_boundary, ulmin(data->len, 512));
2011 blkcnt = howmany(data->len, 512);
2024 struct mmc_data *data = slot->curcmd->data;
2030 if (!slot->cmd_done) {
2032 slot->intmask |= SDHCI_INT_RESPONSE);
2035 if (!slot->data_done && (slot->flags & SDHCI_USE_DMA) &&
2036 slot->curcmd->data != NULL) {
2037 if (data->flags & MMC_DATA_READ) {
2038 left = data->len - slot->offset;
2039 bus_dmamap_sync(slot->dmatag, slot->dmamap,
2041 memcpy((u_char*)data->data + slot->offset, slot->dmamem,
2042 ulmin(left, slot->sdma_bbufsz));
2044 bus_dmamap_sync(slot->dmatag, slot->dmamap,
2047 slot->data_done = 1;
2048 /* If there was error - reset the host. */
2049 if (slot->curcmd->error) {
2050 if (slot->curcmd->error == MMC_ERR_BADCRC)
2051 slot->retune_req |= SDHCI_RETUNE_REQ_RESET;
2052 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_CMD);
2053 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_DATA);
2057 /* If we already have command response - finish. */
2058 if (slot->cmd_done)
2069 ccb = slot->ccb;
2073 mmcio = &ccb->mmcio;
2074 if (!(slot->flags & CMD_STARTED)) {
2075 slot->flags |= CMD_STARTED;
2076 sdhci_start_command(slot, &mmcio->cmd);
2085 if (!(slot->flags & STOP_STARTED) && mmcio->stop.opcode != 0) {
2086 slot->flags |= STOP_STARTED;
2087 sdhci_start_command(slot, &mmcio->stop);
2092 slot_printf(slot, "result: %d\n", mmcio->cmd.error);
2093 if (mmcio->cmd.error == 0 &&
2094 (slot->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST)) {
2095 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_CMD);
2096 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_DATA);
2107 req = slot->req;
2111 if (!(slot->flags & CMD_STARTED)) {
2112 slot->flags |= CMD_STARTED;
2113 sdhci_start_command(slot, req->cmd);
2116 if ((slot->quirks & SDHCI_QUIRK_BROKEN_AUTO_STOP) &&
2117 !(slot->flags & STOP_STARTED) && req->stop) {
2118 slot->flags |= STOP_STARTED;
2119 sdhci_start_command(slot, req->stop);
2123 slot_printf(slot, "result: %d\n", req->cmd->error);
2124 if (!req->cmd->error &&
2125 ((slot->curcmd == req->stop &&
2126 (slot->quirks & SDHCI_QUIRK_BROKEN_AUTO_STOP)) ||
2127 (slot->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) {
2128 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_CMD);
2129 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_DATA);
2136 int
2143 if (slot->req != NULL) {
2149 "CMD%u arg %#x flags %#x dlen %u dflags %#x\n",
2150 req->cmd->opcode, req->cmd->arg, req->cmd->flags,
2151 (req->cmd->data)?(u_int)req->cmd->data->len:0,
2152 (req->cmd->data)?req->cmd->data->flags:0);
2154 slot->req = req;
2155 slot->flags = 0;
2159 while (slot->req != NULL) {
2161 DELAY(10);
2167 int
2179 int
2183 int err = 0;
2186 while (slot->bus_busy)
2187 msleep(slot, &slot->mtx, 0, "sdhciah", 0);
2188 slot->bus_busy++;
2190 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl |= SDHCI_CTRL_LED);
2195 int
2202 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl &= ~SDHCI_CTRL_LED);
2203 slot->bus_busy--;
2213 if (!slot->curcmd) {
2220 slot->curcmd->error = MMC_ERR_TIMEOUT;
2222 slot->curcmd->error = MMC_ERR_BADCRC;
2224 slot->curcmd->error = MMC_ERR_FIFO;
2236 if (!slot->curcmd) {
2242 if (slot->curcmd->data == NULL &&
2243 (slot->curcmd->flags & MMC_RSP_BUSY) == 0) {
2251 slot->curcmd->error = MMC_ERR_TIMEOUT;
2253 slot->curcmd->error = MMC_ERR_BADCRC;
2254 if (slot->curcmd->data == NULL &&
2258 "there is busy-only command.\n", intmask);
2260 slot->curcmd->error = MMC_ERR_INVALID;
2262 if (slot->curcmd->error) {
2269 (slot->curcmd->opcode == MMC_SEND_TUNING_BLOCK ||
2270 slot->curcmd->opcode == MMC_SEND_TUNING_BLOCK_HS200))) {
2271 slot->req->flags |= MMC_TUNE_DONE;
2278 if ((slot->opt & SDHCI_PLATFORM_TRANSFER) &&
2279 SDHCI_PLATFORM_WILL_HANDLE(slot->bus, slot)) {
2280 SDHCI_PLATFORM_START_TRANSFER(slot->bus, slot,
2282 slot->flags |= PLATFORM_DATA_STARTED;
2288 data = slot->curcmd->data;
2289 sdma_bbufsz = slot->sdma_bbufsz;
2292 left = data->len - slot->offset;
2293 if (data->flags & MMC_DATA_READ) {
2294 bus_dmamap_sync(slot->dmatag, slot->dmamap,
2296 memcpy((u_char*)data->data + slot->offset, slot->dmamem,
2299 bus_dmamap_sync(slot->dmatag, slot->dmamap,
2303 slot->offset += sdma_bbufsz;
2304 left = data->len - slot->offset;
2305 if (data->flags & MMC_DATA_READ) {
2306 bus_dmamap_sync(slot->dmatag, slot->dmamap,
2309 memcpy(slot->dmamem, (u_char*)data->data + slot->offset,
2311 bus_dmamap_sync(slot->dmatag, slot->dmamap,
2319 slot->intmask &= ~SDHCI_INT_DMA_END;
2320 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask);
2323 WR4(slot, SDHCI_DMA_ADDRESS, slot->paddr);
2327 if (slot->flags & PLATFORM_DATA_STARTED) {
2328 slot->flags &= ~PLATFORM_DATA_STARTED;
2329 SDHCI_PLATFORM_FINISH_TRANSFER(slot->bus, slot);
2334 if (slot->curcmd != NULL && slot->curcmd->error != 0) {
2335 if (slot->flags & PLATFORM_DATA_STARTED) {
2336 slot->flags &= ~PLATFORM_DATA_STARTED;
2337 SDHCI_PLATFORM_FINISH_TRANSFER(slot->bus, slot);
2347 if (!slot->curcmd) {
2354 SDHCI_RESET(slot->bus, slot, SDHCI_RESET_CMD);
2377 slot->retune_req |= SDHCI_RETUNE_REQ_RESET;
2378 if (slot->curcmd) {
2379 slot->curcmd->error = MMC_ERR_BADCRC;
2383 /* Handle re-tuning interrupt. */
2385 slot->retune_req |= SDHCI_RETUNE_REQ_NEEDED;
2389 slot->intmask &=
2391 slot->intmask |= present ? SDHCI_INT_CARD_REMOVE :
2393 WR4(slot, SDHCI_INT_ENABLE, slot->intmask);
2394 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask);
2437 int
2438 sdhci_generic_read_ivar(device_t bus, device_t child, int which,
2447 *result = slot->host.ios.bus_mode;
2450 *result = slot->host.ios.bus_width;
2453 *result = slot->host.ios.chip_select;
2456 *result = slot->host.ios.clock;
2459 *result = slot->host.f_min;
2462 *result = slot->host.f_max;
2465 *result = slot->host.host_ocr;
2468 *result = slot->host.mode;
2471 *result = slot->host.ocr;
2474 *result = slot->host.ios.power_mode;
2477 *result = slot->host.ios.vdd;
2480 if (slot->opt & SDHCI_TUNING_ENABLED) {
2481 if (slot->retune_req & SDHCI_RETUNE_REQ_RESET) {
2485 if (slot->retune_req & SDHCI_RETUNE_REQ_NEEDED) {
2493 *result = slot->host.ios.vccq;
2496 *result = slot->host.caps;
2499 *result = slot->host.ios.timing;
2503 * Re-tuning modes 1 and 2 restrict the maximum data length
2506 if (slot->opt & SDHCI_TUNING_ENABLED &&
2507 (slot->retune_mode == SDHCI_RETUNE_MODE_1 ||
2508 slot->retune_mode == SDHCI_RETUNE_MODE_2)) {
2524 int
2525 sdhci_generic_write_ivar(device_t bus, device_t child, int which,
2530 int i;
2538 slot->host.ios.bus_mode = value;
2541 slot->host.ios.bus_width = value;
2544 slot->host.ios.chip_select = value;
2548 max_clock = slot->max_clk;
2551 if (slot->version < SDHCI_SPEC_300) {
2567 slot->host.ios.clock = clock;
2569 slot->host.ios.clock = 0;
2572 slot->host.mode = value;
2575 slot->host.ocr = value;
2578 slot->host.ios.power_mode = value;
2581 slot->host.ios.vdd = value;
2584 slot->host.ios.vccq = value;
2587 slot->host.ios.timing = value;
2605 if ((slot->devq = cam_simq_alloc(1)) == NULL)
2608 mtx_init(&slot->sim_mtx, "sdhcisim", NULL, MTX_DEF);
2609 slot->sim = cam_sim_alloc(sdhci_cam_action, sdhci_cam_poll,
2610 "sdhci_slot", slot, device_get_unit(slot->bus),
2611 &slot->sim_mtx, 1, 1, slot->devq);
2613 if (slot->sim == NULL) {
2614 cam_simq_free(slot->devq);
2619 mtx_lock(&slot->sim_mtx);
2620 if (xpt_bus_register(slot->sim, slot->bus, 0) != 0) {
2621 slot_printf(slot, "cannot register SCSI pass-through bus\n");
2622 cam_sim_free(slot->sim, FALSE);
2623 cam_simq_free(slot->devq);
2624 mtx_unlock(&slot->sim_mtx);
2627 mtx_unlock(&slot->sim_mtx);
2629 /* End CAM-specific init */
2630 slot->card_present = 0;
2635 if (slot->sim != NULL) {
2636 mtx_lock(&slot->sim_mtx);
2637 xpt_bus_deregister(cam_sim_path(slot->sim));
2638 cam_sim_free(slot->sim, FALSE);
2639 mtx_unlock(&slot->sim_mtx);
2642 if (slot->devq != NULL)
2643 cam_simq_free(slot->devq);
2653 ccb->ccb_h.status = CAM_SEL_TIMEOUT;
2658 mtx_assert(&slot->sim_mtx, MA_OWNED);
2660 switch (ccb->ccb_h.func_code) {
2662 mmc_path_inq(&ccb->cpi, "Deglitch Networks", sim, maxphys);
2668 struct ccb_trans_settings *cts = &ccb->cts;
2674 cts->protocol = PROTO_MMCSD;
2675 cts->protocol_version = 1;
2676 cts->transport = XPORT_MMCSD;
2677 cts->transport_version = 1;
2678 cts->xport_specific.valid = 0;
2679 cts->proto_specific.mmc.host_ocr = slot->host.host_ocr;
2680 cts->proto_specific.mmc.host_f_min = slot->host.f_min;
2681 cts->proto_specific.mmc.host_f_max = slot->host.f_max;
2682 cts->proto_specific.mmc.host_caps = slot->host.caps;
2684 * Re-tuning modes 1 and 2 restrict the maximum data length
2687 if (slot->opt & SDHCI_TUNING_ENABLED &&
2688 (slot->retune_mode == SDHCI_RETUNE_MODE_1 ||
2689 slot->retune_mode == SDHCI_RETUNE_MODE_2)) {
2694 cts->proto_specific.mmc.host_max_data = max_data;
2696 memcpy(&cts->proto_specific.mmc.ios, &slot->host.ios, sizeof(struct mmc_ios));
2697 ccb->ccb_h.status = CAM_REQ_CMP;
2705 ccb->ccb_h.status = CAM_REQ_CMP;
2710 ccb->ccb_h.status = CAM_REQ_CMP;
2714 * Here is the HW-dependent part of
2721 ccb->ccb_h.status = CAM_REQ_INPROG;
2726 ccb->ccb_h.status = CAM_REQ_INVALID;
2739 static int
2741 int proposed_clock)
2743 int max_clock, clock, i;
2747 max_clock = slot->max_clk;
2750 if (slot->version < SDHCI_SPEC_300) {
2766 static int
2773 ios = &slot->host.ios;
2774 cts = &ccb->cts.proto_specific.mmc;
2775 new_ios = &cts->ios;
2778 if (cts->ios_valid & MMC_CLK) {
2779 ios->clock = sdhci_cam_get_possible_host_clock(slot, new_ios->clock);
2781 slot_printf(slot, "Clock => %d\n", ios->clock);
2783 if (cts->ios_valid & MMC_VDD) {
2784 ios->vdd = new_ios->vdd;
2786 slot_printf(slot, "VDD => %d\n", ios->vdd);
2788 if (cts->ios_valid & MMC_CS) {
2789 ios->chip_select = new_ios->chip_select;
2791 slot_printf(slot, "CS => %d\n", ios->chip_select);
2793 if (cts->ios_valid & MMC_BW) {
2794 ios->bus_width = new_ios->bus_width;
2796 slot_printf(slot, "Bus width => %d\n", ios->bus_width);
2798 if (cts->ios_valid & MMC_PM) {
2799 ios->power_mode = new_ios->power_mode;
2801 slot_printf(slot, "Power mode => %d\n", ios->power_mode);
2803 if (cts->ios_valid & MMC_BT) {
2804 ios->timing = new_ios->timing;
2806 slot_printf(slot, "Timing => %d\n", ios->timing);
2808 if (cts->ios_valid & MMC_BM) {
2809 ios->bus_mode = new_ios->bus_mode;
2811 slot_printf(slot, "Bus mode => %d\n", ios->bus_mode);
2813 if (cts->ios_valid & MMC_VCCQ) {
2814 ios->vccq = new_ios->vccq;
2816 slot_printf(slot, "VCCQ => %d\n", ios->vccq);
2819 /* XXX Provide a way to call a chip-specific IOS update, required for TI */
2823 static int
2826 struct mmc_ios *ios = &slot->host.ios;
2830 __func__, ios->power_mode, ios->clock, ios->bus_width, ios->timing);
2833 if (ios->power_mode == power_off) {
2838 sdhci_set_clock(slot, ios->clock);
2839 sdhci_set_power(slot, (ios->power_mode == power_off) ? 0 : ios->vdd);
2840 if (ios->bus_width == bus_width_8) {
2841 slot->hostctrl |= SDHCI_CTRL_8BITBUS;
2842 slot->hostctrl &= ~SDHCI_CTRL_4BITBUS;
2843 } else if (ios->bus_width == bus_width_4) {
2844 slot->hostctrl &= ~SDHCI_CTRL_8BITBUS;
2845 slot->hostctrl |= SDHCI_CTRL_4BITBUS;
2846 } else if (ios->bus_width == bus_width_1) {
2847 slot->hostctrl &= ~SDHCI_CTRL_8BITBUS;
2848 slot->hostctrl &= ~SDHCI_CTRL_4BITBUS;
2850 panic("Invalid bus width: %d", ios->bus_width);
2852 if (ios->timing == bus_timing_hs &&
2853 !(slot->quirks & SDHCI_QUIRK_DONT_SET_HISPD_BIT))
2854 slot->hostctrl |= SDHCI_CTRL_HISPD;
2856 slot->hostctrl &= ~SDHCI_CTRL_HISPD;
2857 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl);
2859 if(slot->quirks & SDHCI_QUIRK_RESET_ON_IOS)
2860 SDHCI_RESET(slot->bus, slot,
2867 static int
2872 mmcio = &ccb->mmcio;
2875 /* if (slot->req != NULL) {
2881 slot_printf(slot, "CMD%u arg %#x flags %#x dlen %u dflags %#x "
2883 mmcio->cmd.opcode, mmcio->cmd.arg, mmcio->cmd.flags,
2884 mmcio->cmd.data != NULL ? (unsigned int) mmcio->cmd.data->len : 0,
2885 mmcio->cmd.data != NULL ? mmcio->cmd.data->flags : 0,
2886 mmcio->cmd.data != NULL ? mmcio->cmd.data->block_size : 0,
2887 mmcio->cmd.data != NULL ? mmcio->cmd.data->block_count : 0);
2889 if (mmcio->cmd.data != NULL) {
2890 if (mmcio->cmd.data->len == 0 || mmcio->cmd.data->flags == 0)
2891 panic("data->len = %d, data->flags = %d -- something is b0rked",
2892 (int)mmcio->cmd.data->len, mmcio->cmd.data->flags);
2894 slot->ccb = ccb;
2895 slot->flags = 0;