Lines Matching +full:rs +full:-

1 /*-
76 struct ieee80211com *ic = &sc->sc_ic;
77 struct r12a_softc *rs = sc->sc_priv;
79 if (rs->board_type == R92C_BOARD_TYPE_MINICARD ||
80 rs->board_type == R92C_BOARD_TYPE_SOLO ||
81 rs->board_type == R92C_BOARD_TYPE_COMBO)
82 sc->sc_set_led = r88e_set_led;
84 sc->sc_set_led = r21a_set_led;
86 TIMEOUT_TASK_INIT(taskqueue_thread, &rs->rs_chan_check, 0,
90 ic->ic_ioctl = r12a_ioctl_net;
92 rs->rs_scan_start = ic->ic_scan_start;
93 ic->ic_scan_start = r21au_scan_start;
94 rs->rs_scan_end = ic->ic_scan_end;
95 ic->ic_scan_end = r21au_scan_end;
102 struct r12a_softc *rs = sc->sc_priv;
106 /* Install DFS newstate handler (non-monitor vaps only). */
107 if (rvp->id != RTWN_VAP_ID_INVALID) {
108 KASSERT(rvp->id >= 0 && rvp->id <= nitems(rs->rs_newstate),
109 ("%s: wrong vap id %d\n", __func__, rvp->id));
111 rs->rs_newstate[rvp->id] = vap->iv_newstate;
112 vap->iv_newstate = r21au_newstate;
119 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
120 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
121 struct r12a_softc *rs;
123 rs = malloc(sizeof(struct r12a_softc), M_RTWN_PRIV, M_WAITOK | M_ZERO);
125 rs->rs_flags = R12A_RXCKSUM_EN | R12A_RXCKSUM6_EN;
127 rs->rs_radar = 0;
129 "radar_detection", CTLFLAG_RDTUN, &rs->rs_radar,
130 rs->rs_radar, "Enable radar detection (untested)");
132 rs->rs_fix_spur = rtwn_nop_softc_chan;
133 rs->rs_set_band_2ghz = r21a_set_band_2ghz;
134 rs->rs_set_band_5ghz = r21a_set_band_5ghz;
135 rs->rs_init_burstlen = r12au_init_burstlen_usb2;
136 rs->rs_init_ampdu_fwhw = r21a_init_ampdu_fwhw;
137 rs->rs_crystalcap_write = r21a_crystalcap_write;
139 rs->rs_iq_calib_fw_supported = r21a_iq_calib_fw_supported;
141 rs->rs_iq_calib_sw = r21a_iq_calib_sw;
143 rs->ampdu_max_time = 0x5e;
144 rs->ampdu_max_size = 0xffff; /* 64k */
146 rs->ac_usb_dma_size = 0x01;
147 rs->ac_usb_dma_time = 0x10;
149 sc->sc_priv = rs;
155 struct ieee80211com *ic = &sc->sc_ic;
156 struct r12a_softc *rs = sc->sc_priv;
158 ic->ic_htcaps |= IEEE80211_HTC_TXLDPC;
159 if (rs->rs_radar != 0)
160 ic->ic_caps |= IEEE80211_C_DFS;
162 ic->ic_htcaps |=
168 ic->ic_flags_ext |= IEEE80211_FEXT_VHT;
169 ic->ic_vht_cap.vht_cap_info =
184 struct rtwn_softc *sc = &uc->uc_sc;
187 uc->uc_align_rx = r12au_align_rx;
188 uc->tx_agg_desc_num = 6;
191 sc->sc_flags = RTWN_FLAG_EXT_HDR;
193 sc->sc_set_chan = r12a_set_chan;
194 sc->sc_fill_tx_desc = r12a_fill_tx_desc;
195 sc->sc_fill_tx_desc_raw = r12a_fill_tx_desc_raw;
196 sc->sc_fill_tx_desc_null = r12a_fill_tx_desc_null;
197 sc->sc_dump_tx_desc = r12au_dump_tx_desc;
198 sc->sc_tx_radiotap_flags = r12a_tx_radiotap_flags;
199 sc->sc_rx_radiotap_flags = r12a_rx_radiotap_flags;
200 sc->sc_get_rx_stats = r12a_get_rx_stats;
201 sc->sc_get_rssi_cck = r21a_get_rssi_cck;
202 sc->sc_get_rssi_ofdm = r88e_get_rssi_ofdm;
203 sc->sc_classify_intr = r12au_classify_intr;
204 sc->sc_handle_tx_report = r12a_ratectl_tx_complete;
205 sc->sc_handle_tx_report2 = rtwn_nop_softc_uint8_int;
206 sc->sc_handle_c2h_report = r12a_handle_c2h_report;
207 sc->sc_check_frame = r12a_check_frame_checksum;
208 sc->sc_rf_read = r12a_c_cut_rf_read;
209 sc->sc_rf_write = r12a_rf_write;
210 sc->sc_check_condition = r21a_check_condition;
211 sc->sc_efuse_postread = rtwn_nop_softc;
212 sc->sc_parse_rom = r21a_parse_rom;
213 sc->sc_power_on = r21a_power_on;
214 sc->sc_power_off = r21a_power_off;
216 sc->sc_fw_reset = r21a_fw_reset;
217 sc->sc_fw_download_enable = r12a_fw_download_enable;
219 sc->sc_llt_init = r92c_llt_init;
220 sc->sc_set_page_size = rtwn_nop_int_softc;
221 sc->sc_lc_calib = rtwn_nop_softc; /* XXX not used */
222 sc->sc_iq_calib = r12a_iq_calib;
223 sc->sc_read_chipid_vendor = rtwn_nop_softc_uint32;
224 sc->sc_adj_devcaps = r21au_adj_devcaps;
225 sc->sc_vap_preattach = r21au_vap_preattach;
226 sc->sc_postattach = r21a_postattach;
227 sc->sc_detach_private = r12a_detach_private;
229 sc->sc_set_media_status = r12a_set_media_status;
230 sc->sc_set_rsvd_page = r88e_set_rsvd_page;
231 sc->sc_set_pwrmode = r12a_set_pwrmode;
232 sc->sc_set_rssi = rtwn_nop_softc; /* XXX TODO */
234 sc->sc_set_media_status = rtwn_nop_softc_int;
236 sc->sc_beacon_init = r21a_beacon_init;
237 sc->sc_beacon_enable = r92c_beacon_enable;
238 sc->sc_sta_beacon_enable = r12a_sta_beacon_enable;
239 sc->sc_beacon_set_rate = r12a_beacon_set_rate;
240 sc->sc_beacon_select = r21a_beacon_select;
241 sc->sc_temp_measure = r88e_temp_measure;
242 sc->sc_temp_read = r88e_temp_read;
243 sc->sc_init_tx_agg = r21au_init_tx_agg;
244 sc->sc_init_rx_agg = r12au_init_rx_agg;
245 sc->sc_init_ampdu = r12au_init_ampdu;
246 sc->sc_init_intr = r12a_init_intr;
247 sc->sc_init_edca = r12a_init_edca;
248 sc->sc_init_bb = r12a_init_bb;
249 sc->sc_init_rf = r12a_init_rf;
250 sc->sc_init_antsel = r12a_init_antsel;
251 sc->sc_post_init = r12au_post_init;
252 sc->sc_init_bcnq1_boundary = r21a_init_bcnq1_boundary;
253 sc->sc_set_tx_power = rtwn_nop_int_softc_vap;
255 sc->chan_list_5ghz[0] = r12a_chan_5ghz_0;
256 sc->chan_list_5ghz[1] = r12a_chan_5ghz_1;
257 sc->chan_list_5ghz[2] = r12a_chan_5ghz_2;
258 sc->chan_num_5ghz[0] = nitems(r12a_chan_5ghz_0);
259 sc->chan_num_5ghz[1] = nitems(r12a_chan_5ghz_1);
260 sc->chan_num_5ghz[2] = nitems(r12a_chan_5ghz_2);
262 sc->mac_prog = &rtl8821au_mac[0];
263 sc->mac_size = nitems(rtl8821au_mac);
264 sc->bb_prog = &rtl8821au_bb[0];
265 sc->bb_size = nitems(rtl8821au_bb);
266 sc->agc_prog = &rtl8821au_agc[0];
267 sc->agc_size = nitems(rtl8821au_agc);
268 sc->rf_prog = &rtl8821au_rf[0];
270 sc->name = "RTL8821AU";
271 sc->fwname = "rtwn-rtl8821aufw";
272 sc->fwsig = 0x210;
274 sc->page_count = R21A_TX_PAGE_COUNT;
275 sc->pktbuf_count = R12A_TXPKTBUF_COUNT;
277 sc->ackto = 0x80;
278 sc->npubqpages = R12A_PUBQ_NPAGES;
279 sc->page_size = R21A_TX_PAGE_SIZE;
281 sc->txdesc_len = sizeof(struct r12au_tx_desc);
282 sc->efuse_maxlen = R12A_EFUSE_MAX_LEN;
283 sc->efuse_maplen = R12A_EFUSE_MAP_LEN;
284 sc->rx_dma_size = R12A_RX_DMA_BUFFER_SIZE;
286 sc->macid_limit = R12A_MACID_MAX + 1;
287 sc->cam_entry_limit = R12A_CAM_ENTRY_COUNT;
288 sc->fwsize_limit = R12A_MAX_FW_SIZE;
289 sc->temp_delta = R88E_CALIB_THRESHOLD;
291 sc->bcn_status_reg[0] = R92C_TDECTRL;
292 sc->bcn_status_reg[1] = R21A_DWBCN1_CTRL;
293 sc->rcr = R12A_RCR_DIS_CHK_14 |
297 sc->ntxchains = 1;
298 sc->nrxchains = 1;
300 sc->sc_ht40 = 1;