Lines Matching full:power

64     struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT])  in r12a_write_txpower_ht()
67 /* Write per-MCS Tx power. */ in r12a_write_txpower_ht()
69 SM(R12A_TXAGC_MCS0, power[RTWN_RIDX_HT_MCS(0)]) | in r12a_write_txpower_ht()
70 SM(R12A_TXAGC_MCS1, power[RTWN_RIDX_HT_MCS(1)]) | in r12a_write_txpower_ht()
71 SM(R12A_TXAGC_MCS2, power[RTWN_RIDX_HT_MCS(2)]) | in r12a_write_txpower_ht()
72 SM(R12A_TXAGC_MCS3, power[RTWN_RIDX_HT_MCS(3)])); in r12a_write_txpower_ht()
74 SM(R12A_TXAGC_MCS4, power[RTWN_RIDX_HT_MCS(4)]) | in r12a_write_txpower_ht()
75 SM(R12A_TXAGC_MCS5, power[RTWN_RIDX_HT_MCS(5)]) | in r12a_write_txpower_ht()
76 SM(R12A_TXAGC_MCS6, power[RTWN_RIDX_HT_MCS(6)]) | in r12a_write_txpower_ht()
77 SM(R12A_TXAGC_MCS7, power[RTWN_RIDX_HT_MCS(7)])); in r12a_write_txpower_ht()
80 SM(R12A_TXAGC_MCS8, power[RTWN_RIDX_HT_MCS(8)]) | in r12a_write_txpower_ht()
81 SM(R12A_TXAGC_MCS9, power[RTWN_RIDX_HT_MCS(9)]) | in r12a_write_txpower_ht()
82 SM(R12A_TXAGC_MCS10, power[RTWN_RIDX_HT_MCS(10)]) | in r12a_write_txpower_ht()
83 SM(R12A_TXAGC_MCS11, power[RTWN_RIDX_HT_MCS(11)])); in r12a_write_txpower_ht()
85 SM(R12A_TXAGC_MCS12, power[RTWN_RIDX_HT_MCS(12)]) | in r12a_write_txpower_ht()
86 SM(R12A_TXAGC_MCS13, power[RTWN_RIDX_HT_MCS(13)]) | in r12a_write_txpower_ht()
87 SM(R12A_TXAGC_MCS14, power[RTWN_RIDX_HT_MCS(14)]) | in r12a_write_txpower_ht()
88 SM(R12A_TXAGC_MCS15, power[RTWN_RIDX_HT_MCS(15)])); in r12a_write_txpower_ht()
96 struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) in r12a_write_txpower_vht()
101 SM(R12A_TXAGC_NSS1_MCS0, power[RTWN_RIDX_VHT_MCS(0, 0)]) | in r12a_write_txpower_vht()
102 SM(R12A_TXAGC_NSS1_MCS1, power[RTWN_RIDX_VHT_MCS(0, 1)]) | in r12a_write_txpower_vht()
103 SM(R12A_TXAGC_NSS1_MCS2, power[RTWN_RIDX_VHT_MCS(0, 2)]) | in r12a_write_txpower_vht()
104 SM(R12A_TXAGC_NSS1_MCS3, power[RTWN_RIDX_VHT_MCS(0, 3)])); in r12a_write_txpower_vht()
108 SM(R12A_TXAGC_NSS1_MCS4, power[RTWN_RIDX_VHT_MCS(0, 4)]) | in r12a_write_txpower_vht()
109 SM(R12A_TXAGC_NSS1_MCS5, power[RTWN_RIDX_VHT_MCS(0, 5)]) | in r12a_write_txpower_vht()
110 SM(R12A_TXAGC_NSS1_MCS6, power[RTWN_RIDX_VHT_MCS(0, 6)]) | in r12a_write_txpower_vht()
111 SM(R12A_TXAGC_NSS1_MCS7, power[RTWN_RIDX_VHT_MCS(0, 7)])); in r12a_write_txpower_vht()
116 SM(R12A_TXAGC_NSS1_MCS8, power[RTWN_RIDX_VHT_MCS(0, 8)]) | in r12a_write_txpower_vht()
117 SM(R12A_TXAGC_NSS1_MCS9, power[RTWN_RIDX_VHT_MCS(0, 9)]) | in r12a_write_txpower_vht()
122 SM(R12A_TXAGC_NSS1_MCS8, power[RTWN_RIDX_VHT_MCS(0, 8)]) | in r12a_write_txpower_vht()
123 SM(R12A_TXAGC_NSS1_MCS9, power[RTWN_RIDX_VHT_MCS(0, 9)]) | in r12a_write_txpower_vht()
124 SM(R12A_TXAGC_NSS2_MCS0, power[RTWN_RIDX_VHT_MCS(1, 0)]) | in r12a_write_txpower_vht()
125 SM(R12A_TXAGC_NSS2_MCS1, power[RTWN_RIDX_VHT_MCS(1, 1)])); in r12a_write_txpower_vht()
131 SM(R12A_TXAGC_NSS2_MCS2, power[RTWN_RIDX_VHT_MCS(1, 2)]) | in r12a_write_txpower_vht()
132 SM(R12A_TXAGC_NSS2_MCS3, power[RTWN_RIDX_VHT_MCS(1, 3)]) | in r12a_write_txpower_vht()
133 SM(R12A_TXAGC_NSS2_MCS4, power[RTWN_RIDX_VHT_MCS(1, 4)]) | in r12a_write_txpower_vht()
134 SM(R12A_TXAGC_NSS2_MCS5, power[RTWN_RIDX_VHT_MCS(1, 5)])); in r12a_write_txpower_vht()
140 SM(R12A_TXAGC_NSS2_MCS2, power[RTWN_RIDX_VHT_MCS(1, 6)]) | in r12a_write_txpower_vht()
141 SM(R12A_TXAGC_NSS2_MCS3, power[RTWN_RIDX_VHT_MCS(1, 7)]) | in r12a_write_txpower_vht()
142 SM(R12A_TXAGC_NSS2_MCS4, power[RTWN_RIDX_VHT_MCS(1, 8)]) | in r12a_write_txpower_vht()
143 SM(R12A_TXAGC_NSS2_MCS5, power[RTWN_RIDX_VHT_MCS(1, 9)])); in r12a_write_txpower_vht()
152 struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) in r12a_write_txpower_cck()
156 /* Write per-CCK rate Tx power. */ in r12a_write_txpower_cck()
158 SM(R12A_TXAGC_CCK1, power[RTWN_RIDX_CCK1]) | in r12a_write_txpower_cck()
159 SM(R12A_TXAGC_CCK2, power[RTWN_RIDX_CCK2]) | in r12a_write_txpower_cck()
160 SM(R12A_TXAGC_CCK55, power[RTWN_RIDX_CCK55]) | in r12a_write_txpower_cck()
161 SM(R12A_TXAGC_CCK11, power[RTWN_RIDX_CCK11])); in r12a_write_txpower_cck()
167 struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) in r12a_write_txpower_ofdm()
170 /* Write per-OFDM rate Tx power. */ in r12a_write_txpower_ofdm()
172 SM(R12A_TXAGC_OFDM06, power[RTWN_RIDX_OFDM6]) | in r12a_write_txpower_ofdm()
173 SM(R12A_TXAGC_OFDM09, power[RTWN_RIDX_OFDM9]) | in r12a_write_txpower_ofdm()
174 SM(R12A_TXAGC_OFDM12, power[RTWN_RIDX_OFDM12]) | in r12a_write_txpower_ofdm()
175 SM(R12A_TXAGC_OFDM18, power[RTWN_RIDX_OFDM18])); in r12a_write_txpower_ofdm()
177 SM(R12A_TXAGC_OFDM24, power[RTWN_RIDX_OFDM24]) | in r12a_write_txpower_ofdm()
178 SM(R12A_TXAGC_OFDM36, power[RTWN_RIDX_OFDM36]) | in r12a_write_txpower_ofdm()
179 SM(R12A_TXAGC_OFDM48, power[RTWN_RIDX_OFDM48]) | in r12a_write_txpower_ofdm()
180 SM(R12A_TXAGC_OFDM54, power[RTWN_RIDX_OFDM54])); in r12a_write_txpower_ofdm()
185 const struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) in r12a_tx_power_training()
193 power_level = (int32_t) power[RTWN_RIDX_HT_MCS(7)]; in r12a_tx_power_training()
215 struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) in r12a_write_txpower()
218 r12a_write_txpower_cck(sc, chain, c, power); in r12a_write_txpower()
219 r12a_write_txpower_ofdm(sc, chain, c, power); in r12a_write_txpower()
220 r12a_write_txpower_ht(sc, chain, c, power); in r12a_write_txpower()
221 r12a_write_txpower_vht(sc, chain, c, power); in r12a_write_txpower()
223 r12a_tx_power_training(sc, chain, c, power); in r12a_write_txpower()
275 struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) in r12a_get_txpower()
295 power[ridx] = rs->cck_tx_pwr[chain][group]; in r12a_get_txpower()
297 power[ridx] = rs->ht40_tx_pwr_2g[chain][group]; in r12a_get_txpower()
300 power[ridx] += rs->ofdm_tx_pwr_diff_2g[chain][0]; in r12a_get_txpower()
317 power[ridx] += pwr_diff; in r12a_get_txpower()
322 power[ridx] = rs->ht40_tx_pwr_5g[chain][group]; in r12a_get_txpower()
325 power[ridx] = rs->ht40_tx_pwr_5g[chain][group]; in r12a_get_txpower()
327 /* Add power for OFDM rates */ in r12a_get_txpower()
329 power[ridx] += rs->ofdm_tx_pwr_diff_5g[chain][0]; in r12a_get_txpower()
347 power[ridx] += pwr_diff; in r12a_get_txpower()
353 power[ridx] += pwr_diff; in r12a_get_txpower()
360 if (power[ridx] > R92C_MAX_TX_PWR) in r12a_get_txpower()
361 power[ridx] = R92C_MAX_TX_PWR; in r12a_get_txpower()
366 if (power[ridx] > R92C_MAX_TX_PWR) in r12a_get_txpower()
367 power[ridx] = R92C_MAX_TX_PWR; in r12a_get_txpower()
372 /* Dump per-rate Tx power values. */ in r12a_get_txpower()
373 printf("Tx power for chain %d:\n", chain); in r12a_get_txpower()
375 printf("Rate %d = %u\n", ridx, power[ridx]); in r12a_get_txpower()
384 uint8_t power[RTWN_RIDX_COUNT]; in r12a_set_txpower() local
388 memset(power, 0, sizeof(power)); in r12a_set_txpower()
389 /* Compute per-rate Tx power values. */ in r12a_set_txpower()
390 r12a_get_txpower(sc, i, c, power); in r12a_set_txpower()
391 /* Write per-rate Tx power values to hardware. */ in r12a_set_txpower()
392 r12a_write_txpower(sc, i, c, power); in r12a_set_txpower()
656 /* Set Tx power for this new channel. */ in r12a_set_chan()